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数据搜索系统，热门电子元器件搜索 |
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数据搜索系统，热门电子元器件搜索 |
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PSD813F2 数据表(PDF) 114 Page - STMicroelectronics |
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PSD813F2 数据表(HTML) 114 Page - STMicroelectronics |
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114 / 128 page  AC/DC parameters PSD8XXFX 114/128 Doc ID 7833 Rev 7 Figure 49. ISC timing ISCCH TCK TDI/TMS ISC OUTPUTS/TDO ISC OUTPUTS/TDO t ISCCL t ISCPH t ISCPSU t ISCPVZ t ISCPZV t ISCPCO t AI02865 Table 68. ISC timing (5 V devices) Symbol Parameter Conditions -70 -90 -15 Unit Min Max Min Max Min Max tISCCF Clock (TCK, PC1) frequency (except for PLD) (1) 20 18 14 MHz tISCCH Clock (TCK, PC1) high time (except for PLD) (1) 23 26 31 ns tISCCL Clock (TCK, PC1) low time (except for PLD) (1) 23 26 31 ns tISCCFP Clock (TCK, PC1) frequency (PLD only) (2) 22 2 MHz tISCCHP Clock (TCK, PC1) high time (PLD only) (2) 240 240 240 ns tISCCLP Clock (TCK, PC1) low time (PLD only) (2) 240 240 240 ns tISCPSU ISC port setup time 7 8 10 ns tISCPH ISC port hold up time 5 5 5 ns tISCPCO ISC port clock to output 21 23 25 ns tISCPZV ISC port high-impedance to valid output 21 23 25 ns tISCPVZ ISC port valid output to high-Impedance 21 23 25 ns 1. For non-PLD Programming, Erase or in ISC by-pass mode. 2. For program or erase PLD only. Obsolete Product(s) - Obsolete Product(s) |
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