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STM32F103RG 数据表(PDF) 64 Page - STMicroelectronics

部件名 STM32F103RG
功能描述  XL-density performance line ARM-based 32-bit MCU
PDF  120 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

STM32F103RG 数据表(HTML) 64 Page - STMicroelectronics

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Electrical characteristics
STM32F103xF, STM32F103xG
64/120
Doc ID 16554 Rev 3
Table 32.
Asynchronous non-multiplexed SRAM/PSRAM/NOR write timings(1)
1.
CL = 15 pF.
Symbol
Parameter
Min
Max
Unit
tw(NE)
FSMC_NE low time
3tHCLK + 0.5
3tHCLK + 1.5 ns
tv(NWE_NE)
FSMC_NEx low to FSMC_NWE low
tHCLK + 0.5
tHCLK + 1.5
ns
tw(NWE)
FSMC_NWE low time
tHCLK – 0.5
tHCLK + 1
ns
th(NE_NWE)
FSMC_NWE high to FSMC_NE high hold time
tHCLK – 0.5
-
ns
tv(A_NE)
FSMC_NEx low to FSMC_A valid
-
0
ns
th(A_NWE)
Address hold time after FSMC_NWE high
tHCLK
-ns
tv(BL_NE)
FSMC_NEx low to FSMC_BL valid
-
1.5
ns
th(BL_NWE)
FSMC_BL hold time after FSMC_NWE high
tHCLK – 1.5
-
ns
tv(Data_NE)
FSMC_NEx low to Data valid
-
tHCLK
ns
th(Data_NWE) Data hold time after FSMC_NWE high
tHCLK
-ns
tv(NADV_NE)
FSMC_NEx low to FSMC_NADV low
-
0
ns
tw(NADV)
FSMC_NADV low time
-
tHCLK + 1.5
ns
Table 33.
Asynchronous read muxed
Symbol
Parameter
Min
Max
Unit
tw(NE)
FSMC_NE low time
7tHCLK + 0.5
7tHCLK + 2
ns
tv(NOE_NE)
FSMC_NEx low to FSMC_NOE low
3tHCLK + 0.5
3tHCLK + 1.5
tw(NOE)
FSMC_NOE low time
4tHCLK – 1
4tHCLK + 1
th(NE_NOE)
FSMC_NOE high to FSMC_NE high hold time
0.5
-
tv(A_NE)
FSMC_NEx low to FSMC_A valid
-
0
tv(NADV_NE)
FSMC_NEx low to FSMC_NADV low
0
1
tw(NADV)
FSMC_NADV low time
tHCLK + 0.5
tHCLK + 2
th(AD_NADV)
FSMC_AD (address) valid hold time after
FSMC NADV high
tHCLK
-
th(A_NOE)
Address hold time after FSMC_NOE high
tHCLK – 2
-
th(BL_NOE)
FSMC_BL time after FSMC_NOE high
0.5
-
tv(BL_NE)
FSMC_NEx low to FSMC_BL valid
-
0
tsu(Data_NE)
Data to FSMC_NEx high setup time
4tHCLK – 0.5
-
tsu(Data_NOE) Data to FSMC_NOE high setup time
4tHCLK – 1
-
th(Data_NE)
Data hold time after FSMC_NEx high
0
-
th(Data_NOE)
Data hold time after FSMC_NOE high
0
-



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