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STM32F103RG 数据表(PDF) 15 Page - STMicroelectronics

部件名 STM32F103RG
功能描述  XL-density performance line ARM-based 32-bit MCU
PDF  120 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

STM32F103RG 数据表(HTML) 15 Page - STMicroelectronics

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STM32F103xF, STM32F103xG
Description
Doc ID 16554 Rev 3
15/120
2.3
Overview
2.3.1
ARM® Cortex™-M3 core with embedded Flash and SRAM
The ARM Cortex™-M3 processor is the latest generation of ARM processors for embedded
systems. It has been developed to provide a low-cost platform that meets the needs of MCU
implementation, with a reduced pin count and low-power consumption, while delivering
outstanding computational performance and an advanced system response to interrupts.
The ARM Cortex™-M3 32-bit RISC processor features exceptional code-efficiency,
delivering the high-performance expected from an ARM core in the memory size usually
associated with 8- and 16-bit devices.
With its embedded ARM core, STM32F103xF and STM32F103xG performance line family
is compatible with all ARM tools and software.
Figure 1 shows the general block diagram of the device family.
2.3.2
Memory protection unit
The memory protection unit (MPU) is used to separate the processing of tasks from the data
protection. The MPU can manage up to 8 protection areas that can all be further divided up
into 8 subareas. The protection area sizes are between 32 bytes and the whole 4 gigabytes
of addressable memory.
The memory protection unit is especially helpful for applications where some critical or
certified code has to be protected against the misbehavior of other tasks. It is usually
managed by an RTOS (real-time operating system). If a program accesses a memory
location that is prohibited by the MPU, the RTOS can detect it and take action. In an RTOS
environment, the kernel can dynamically update the MPU area setting, based on the
process to be executed.
The MPU is optional and can be bypassed for applications that do not need it.
2.3.3
Embedded Flash memory
768 Kbytes to 1 Mbyte of embedded Flash are available for storing programs and data. The
Flash memory is organized as two banks. The first bank has a size of 512 Kbytes. The
second bank is either 256 or 512 Kbytes depending on the device. This gives the device the
capability of writing to one bank while executing code from the other bank (read-while-write
capability).
2.3.4
CRC (cyclic redundancy check) calculation unit
The CRC (cyclic redundancy check) calculation unit is used to get a CRC code from a 32-bit
data word and a fixed generator polynomial.
Among other applications, CRC-based techniques are used to verify data transmission or
storage integrity. In the scope of the EN/IEC 60335-1 standard, they offer a means of
verifying the Flash memory integrity. The CRC calculation unit helps compute a signature of
the software during runtime, to be compared with a reference signature generated at link-
time and stored at a given memory location.



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