STM32F103RG datasheet(22/120 Pages) STMICROELECTRONICS

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Description

STM32F103xF, STM32F103xG

22/120

Doc ID 16554 Rev 3

2.3.21

Serial peripheral interface (SPI)

Up to three SPIs are able to communicate up to 18 Mbits/s in slave and master modes in

full-duplex and simplex communication modes. The 3-bit prescaler gives 8 master mode

frequencies and the frame is configurable to 8 bits or 16 bits. The hardware CRC

generation/verification supports basic SD Card/MMC modes.

All SPIs can be served by the DMA controller.

2.3.22

Inter-integrated sound (I2S)

Two standard I2S interfaces (multiplexed with SPI2 and SPI3) are available, that can be

operated in master or slave mode. These interfaces can be configured to operate with 16/32

bit resolution, as input or output channels. Audio sampling frequencies from 8 kHz up to

48 kHz are supported. When either or both of the I2S interfaces is/are configured in master

mode, the master clock can be output to the external DAC/CODEC at 256 times the

sampling frequency.

2.3.23

SDIO

An SD/SDIO/MMC host interface is available, that supports MultiMediaCard System

Specification Version 4.2 in three different databus modes: 1-bit (default), 4-bit and 8-bit.

The interface allows data transfer at up to 48 MHz in 8-bit mode, and is compliant with SD

Memory Card Specifications Version 2.0.

The SDIO Card Specification Version 2.0 is also supported with two different databus

modes: 1-bit (default) and 4-bit.

The current version supports only one SD/SDIO/MMC4.2 card at any one time and a stack

of MMC4.1 or previous.

In addition to SD/SDIO/MMC, this interface is also fully compliant with the CE-ATA digital

protocol Rev1.1.

2.3.24

Controller area network (CAN)

The CAN is compliant with specifications 2.0A and B (active) with a bit rate up to 1 Mbit/s. It

can receive and transmit standard frames with 11-bit identifiers as well as extended frames

with 29-bit identifiers. It has three transmit mailboxes, two receive FIFOs with 3 stages and

14 scalable filter banks.

2.3.25

Universal serial bus (USB)

The STM32F103xF and STM32F103xG performance line embed a USB device peripheral

compatible with the USB full-speed 12 Mbs. The USB interface implements a full-speed (12

Mbit/s) function interface. It has software-configurable endpoint setting and suspend/resume

support. The dedicated 48 MHz clock is generated from the internal main PLL (the clock

source must use a HSE crystal oscillator).

2.3.26

GPIOs (general-purpose inputs/outputs)

Each of the GPIO pins can be configured by software as output (push-pull or open-drain), as

input (with or without pull-up or pull-down) or as peripheral alternate function. Most of the

GPIO pins are shared with digital or analog alternate functions. All GPIOs are high current-

capable.

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