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STM32F103RG 数据表(PDF) 71 Page - STMicroelectronics |
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STM32F103RG 数据表(HTML) 71 Page - STMicroelectronics |
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71 / 120 page  STM32F103xF, STM32F103xG Electrical characteristics Doc ID 16554 Rev 3 71/120 Figure 28. Synchronous non-multiplexed NOR/PSRAM read timings Table 38. Synchronous non-multiplexed NOR/PSRAM read timings(1) 1. CL = 15 pF. Symbol Parameter Min Max Unit tw(CLK) FSMC_CLK period 27.6 - ns td(CLKL-NExL) FSMC_CLK low to FSMC_NEx low (x = 0...2) - 1.5 ns td(CLKL-NExH) FSMC_CLK low to FSMC_NEx high (x = 0...2) 2 - ns td(CLKL-NADVL) FSMC_CLK low to FSMC_NADV low - 0.5 ns td(CLKL-NADVH) FSMC_CLK low to FSMC_NADV high 1 - ns td(CLKL-AV) FSMC_CLK low to FSMC_Ax valid (x = 0...25) - 0 ns td(CLKL-AIV) FSMC_CLK low to FSMC_Ax invalid (x = 0...25) 2 - ns td(CLKL-NOEL) FSMC_CLK low to FSMC_NOE low - tHCLK + 1 ns td(CLKL-NOEH) FSMC_CLK low to FSMC_NOE high 1.5 - ns tsu(DV-CLKH) FSMC_D[15:0] valid data before FSMC_CLK high 3.5 - ns th(CLKH-DV) FSMC_D[15:0] valid data after FSMC_CLK high 0 - ns |
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