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AS8510

Datasheet - Electrical Character i s t ics

6.4.2 Differential Input Amplifier for Voltage Channel

Notes:

1. Input for the voltage channel can be as high as 1220mV, in this high input case PGA will be bypassed.

2. Leakage test accuracy is limited by tester resource accuracy and tester hardware, especially at low temperatures due to condensing

moisture.

3. For gain 100 PGA input common mode is 0V and the minimum supply is 3.15V.

4. The measurement ranges are referred only by the gain of input amplifier, while other parameters such as bandwidth etc. are pro-

grammed independently.

5. This parameter is not measured directly in production. It is measured indirectly via gain measurements of the whole path. It is guaran-

teed by design.

6. Pole frequency of input amplifier changes with changing the GAIN. The number is valid for the gain at G1, while the bandwidth will be

higher for other ranges. This parameter is not measured in production.

7. Noise density calculated by taking system bandwidth as 150Hz.

8. Based on device evaluation. Not tested.

9. No impact on the measurement path. If the chopping is enabled, both the offset and offset drift will be eliminated.

10. For negative input voltages up to -160mV below ground, Input leakage is typically -20nA @ 65ºC due to forward conductance of

protection diode.

Table 16. Differential Input Amplifier for Voltage Channel

Symbol

Parameter

Conditions

Min

Typ

Max

Units

Input voltage range

1, 10

-160

+160

mV

Input current

2, 10

VBAT_IN, ETR, ETS @ +160mV input

voltage at 125ºC with PGA

-50

2

50

nA

ICM

Absolute input voltage range

3

-160

+300

mV

G = G1

Gain1

4, 5

100

G = G2

Gain2

4, 5

40

G = G3

Gain3

4, 5

25

G = G4

Gain4

4, 5

5

e

Gain deviation

i = 1, 2, 3, 4

0.9 * Gi

1.1 * Gi

Pole frequency

5, 6

15

kHz

Noise density

5, 7

25

nV/

√Hz

THD

Total harmonic distortion

For 150Hz input signal

70

dB

Gain drift with temperature

8

-20ºC to +65ºC

Gain 5, 25, referenced to room

temperature

±0.3

%

Input referred offset

9

After trim at +65ºC

350

µV

Chopping enabled

0

LSB

Offset drift with temperature

9

350

µV