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AS8510-ASSP 数据表(PDF) 24 Page - ams AG |
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AS8510-ASSP 数据表(HTML) 24 Page - ams AG |
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24 / 47 page ![]() www.ams.com/AS8510 Revision 3.5 23 - 46 AS8510 Datasheet - Detailed Descr i p ti on 7.8.2 Write Command For write command, C0=0. After the command code C0 is transferred, the address of register to be written is provided from MSB to LSB. Subsequently one or more data bytes can be transferred from MSB to LSB. For each data byte following the first one, used address is the incremented value of the previously written address. Each bit of the frame has to be driven by the SPI master on the SPI clock transfer edge. The SPI slave samples it on the next clock edge. These edges are determined by the level of SCLK as shown in Table 29. Figure 10 and Figure 11 are examples of write command without and with address self-increment. Figure 10. Protocol for Serial Data Write with Length = 1 Figure 11. Protocol for Serial Data Write with Length = 4 CS SCLK SDI SDO 0 A6 A5 A4 A0 A1 A2 A3 D0 D1 D2 D3 D4 D5 D7 D6 Data D7 – D0 is moved to Address A4..A0 here CS SCLK SDI SDO 0 A 6 A 1 A 4 A 2 A 3 D 0 D 1 D 2 D 3 D 4 D 5 D 7 D 6 Data D7-D0 is moved to Address A4-A0 here Data D7-D0 is moved to Address A4-A0 +1 here Data D7-D0 is moved to Address A4-A0 +2 here Data D7-D0 is moved to Address A4-A0 +3 here Data D7-D0 is moved to Address A4-A0 +4 here A 0 A 5 D 1 D 2 D 3 D 4 D 5 D 7 D 6 D 0 D 1 D 2 D 3 D 4 D 5 D 7 D 6 D 0 D 1 D 2 D 3 D 4 D 5 D 7 D 6 D 0 D 1 D 2 D 3 D 4 D 5 D 7 D 6 D 0 |
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