AS8510-ASSP datasheet(33/47 Pages) AMSCO

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AS8510

Datasheet - Detailed Descr i p ti on

MOD_CTL_REG

(Mode Control Registers)

0000_0000

R/W

D[7:6]

These two bits select the operating mode of the Device.

Default is 00 (Normal Mode 1)

Normal Mode 1

Normal Mode 2

Standby Mode 1

Standby Mode 2

D[5:3]

These three bits select the number of cycles to be

ignored before comparison with the set threshold in

Standy Mode. Default is 000 (3 cycles of data)

000

3 cycles of data

001

4 cycles of data

010

5 cycles of data

011

6cycles of data

100

7 cycles of data

101

8 cycles of data

110

9 cycles of data

111

10 cycles of data

D[2]

This bit controls the CHOP_CLK availability on

CHOP_CLK pin.

Default is 0

Disabled

Enabled

D[1]

Enabling the MEN pin to indicate transition from

Standby to Normal Mode.

Disabled

Enabled

D[0]

This bit is used to take the device from STOP state to

any of the Modes based on D[7:6] selection of this

Retain in STOP state

Enables transition to Normal or Standby

Modes.

MOD_Ta_REG1

(Ta Control Register)

1000_0000

D[7]

Unit of Ta in SBM1/SBM2. Default is 1

Unit is in milliseconds

Unit is in seconds

D[6:0]

MSB value of Ta

MOD_Ta_REG2

(Ta Control Register)

0000_0000

R/W

D[7:0]

Unit of Ta in SBM1/SBM2

LSB value of Ta

MOD_ITH_REG1

(Current Threshold Register)

0000_0000

R/W

D[7:0]

MSB bits of 16 bits SBM2 threshold register

MOD_ITH_REG2

(Current Threshold Register)

0000_0000

R/W

D[7:0]

LSB bits of 16 bits SBM2 threshold register

Table 33. Control Registers

Addr in

HEX

POR Value

R/W

8-bit Control / Status Data

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