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CS4630 数据表(PDF) 19 Page - Cirrus Logic |
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CS4630 数据表(HTML) 19 Page - Cirrus Logic |
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19 / 38 page ![]() CS4630 DS445PP1 19 4.3 Subsystem Vendor ID Fields The Subsystem ID and Subsystem Vendor ID con- figuration fields can be loaded in two different ways. For systems using an EEPROM, typically add-in cards, the EEPROM auto loads the data. For a system using BIOS, typically mother boards, the Configuration Space is loaded at offset FCh (see Table 2). Once these values are loaded they will ap- pear in the Configuration Space offset 2Ch. The Subsystem ID and Subsystem Vendor ID fields in the PCI Configuration Space default to value 0000h unless an external EEPROM device is de- tected or unless the host has written to the appropri- ate internal register to program the values. 4.4 Dynamic Config Register The Dynamic Configuration Register is primarily used to configure the hardware to support the gen- eration of the PME# signal to the PCI bus and store the particular hardware configuration. Bit 31, PME_Support Shadow, shadows bits 14-11 of the configuration space PMC Register at offset 42h. Bits 29-27 will shadow bits 8-6 of the PMC Regis- ter if the Vaux_Sense pin is high indicating auxil- lary power is available. Otherwise, bits 8-6 will be set to ‘000’b. Bits 23-0 are general purpose Read/Write bits and the definitions will be deter- mined by the driver. The Dynamic Configuration Register bits can be loaded in two different ways. For systems using an EEPROM typically add-in cards, the EEPROM auto loads the data. For a system using BIOS, typi- cally mother boards, the Dynamic Configuration Register is loaded at offset F8h (see Table 2). The Dynamic Configuration Register bits will default to value 0000h unless an external EEPROM device is detected or unless the host has written to the appro- priate internal register to program the values. 4.5 Interrupt Signal The CS4630 PCI Interface includes an interrupt controller function which receives interrupt re- quests from multiple sources within the CS4630 device, and presents a single interrupt line (INTA) to the host system. Interrupt control registers in the CS4630 provide the host interrupt service routine with the ability to identify the source of the inter- rupt and to clear the interrupt sources. In the CS4630, the single external interrupt is expanded by the use of “virtual channels”. Each data stream which is read from or written to a modular buffer is assigned a virtual channel number. This virtual channel number is signalled by the DMA sub- system anytime the associated modular buffer pointer passes the mid-point or wraps around. Vir- tual channels are also used for message passing be- tween the CS4630 and the host. |
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