CS4630 datasheet(20/38 Pages) CIRRUS

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CS4630

DS445PP1

5. SERIAL PORT CONFIGURATIONS

A flexible serial audio interface is provided which

allows connection to external Analog-to-Digital

Converters (ADCs), Digital-to-Analog Converters

(DACs) or Codecs (combined ADC and DAC

functions) in several different configurations. The

serial audio interface includes a primary input/out-

put port with dedicated serial data pins (SDIN, SD-

OUT), two auxiliary audio output ports (SDO2,

SDO3) which share pins with the joystick interface

button input functions, and one auxiliary audio in-

put port (SDIN2). Each of these digital audio input

and output pins carry two channels of audio data.

These two channels may comprise the left and right

channels of a stereo audio signal, or two indepen-

dent monaural audio signals.

Each digital audio channel is internally buffered

through a 16 sample x 20-bit FIFO. The data format

for the serial digital audio ports varies depending

on the configuration. The primary configuration in-

cludes a CS4630 plus a CS4297/97A/98/99.

The

CS4630

communicates

with

the

CS4297/97A/98/99 over the AC-link as specified

in the Intel‚ Audio Codec ‘97 Specification (revi-

sion 2.1). A block diagram for the AC ’97 Control-

ler configuration is given in Figure 11. In this

configuration, the AC ’97 Codec is the timing mas-

ter for the digital audio link. The ASDOUT output

supports data transmission on all ten possible sam-

ple slots (output slots 3 - 12). The ASDIN input

supports receiving of audio sample data on all input

sample slots (input slots 3 - 12). The SDO2 and

SDO3 serial outputs and the SDIN2 serial input are

not supported in this configuration. In the dual AC

‘97 system, the primary AC ‘97 codec is connected

as in the single codec case; however, a second

CS4297A/98/99 is connected to a completely sepa-

rate serial data in pin ASDIN2. A block diagram

ABITCLK

ASYNC

ASDOUT

ASDIN

ARST#

MIDIIN

MIDIOUT

JACX, JACY, JBCX, JBCY

JAB1, JAB2, JBB1, JBB2

Joystick/

MIDI Port

BIT_CLK

SYNC

SDATA_OUT

SDATA_IN

RESET#

24.576 MHz

CS4297A

12.288 MHz

48 kHz

Figure 11. AC ‘97 Codec Connection Diagram

CS4630

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