CS4630

DS445PP1

35

ASDIN2 - Second AC ‘97 Data In, Input, Weak Internal Pulldown

AC ‘97 (2.1) Serial audio input data for the second AC ‘97 Codec. The other AC link pins are

either shared with the first AC ‘97 interface or connected to the second complete AC ‘97

interface listed below.

ABITCLK2 - Second AC ‘97 Link Bit Clock, Input, Weak Internal Pulldown

Master timing clock for the second AC ‘97 serial link.

ASYNC2 - Second AC ‘97 Link Frame Sync, Output

Framing clock for second AC ‘97 link serial audio data. This pin is an output which indicates

the framing for the second AC ’97 link.

ASDOUT2 - Second AC ‘97 Link Data Out, Output

AC ‘97 serial data out/Serial audio output data.

ARST2# - Second AC ‘97 Link Reset, Output, Active Low

Second AC ’97 link reset pin. This pin also functions as a general purpose reset output in non-

AC ’97 configurations and will follow RST# to ground, but must be forced high by software.

12.6 ZV Port Serial Interface

ZSCLK - ZV Port Serial Clock, Input, Weak Internal Pulldown

ZV Port serial bit clock.

ZLRCLK - ZV Port Left/Right Clock, Input, Weak Internal Pulldown

ZV Port left/right channel delineation.

ZSDATA - ZV Port Serial Data In, Input, Weak Internal Pulldown

ZV Port serial data input pin.

12.7 Consumer Digital Audio I/O (S/PDIF)

SPDIFO - Consumer Digital Audio Out, Output

This CMOS pin outputs serial data that conforms to the IEC-958 consumer format. The data is

bi-phase mark encoded and requires external drivers.

SPDIFI - Consumer Digital Audio In, Input, Weak Internal Pulldown

This pin receives asynchronous serial data that conforms to the IEC-958 consumer format. The

data should be bi-phase mark encoded.