SAP5SD-B-G1-R datasheet(33/63 Pages) ETC2

33 / 63 page

SAP5S / SAP51

Universal Actuator-Sensor Interface IC

Data Sheet

July 17, 2012

the prior written consent of the copyright owner. The information furnished in this publication is PRELIMINARY and subject to

changes without notice.

33 of 62

PSTBn

tPI-latch

parameter port output data

Parameter input value (PIx) = Parameter output value (POx)

(wired AND with external signal source value)

keep stable

min

max

P0..P3

tSTB

tPSTBn

tP-off

Figure 6: Timing Diagram Parameter Port P0 ... P3, PSTBn

4.8. Data Port and DSTBn

4.8.1.

Timing of Data I/O and DSTBn

Every data pin (D0…D3) contains an NMOS open drain output driver as well as a high voltage high

impedance input stage. Received output data is stored at the Data Output Register and subsequently

forwarded to the data pins. A certain time (tDI-latch) after new output data was written to the port the input data is

sampled.

The availability of new output data is signaled by the Data Strobe (DSTBn) signal as shown in Figure 7. The

DSTBn pin has an additional reset input function, which is described further in chapter 4.13 IC Reset.

Any IC reset turns the Data Output Register to 0xF and forces the data output drivers to high impedance state.

Simultaneously, a Data Strobe is generated, having the same tsetup timing and tDSTBn pulse width, as new

output data would be driven.

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