SAP5SD-B-G1-R datasheet(34/63 Pages) ETC2

34 / 63 page

SAP5S / SAP51

Universal Actuator-Sensor Interface IC

Data Sheet

July 17, 2012

the prior written consent of the copyright owner. The information furnished in this publication is PRELIMINARY and subject to

changes without notice.

34 of 62

Table 21: Timing Data Port Outputs

Symbol Parameter

Min

Max

Unit

Note

tSTB

Output data is valid after DSTBn HIGH/LOW edge

0.0

1.5

µs

thold

Output driver is at high impedance state after DSTBn LOW/HIGH

0.2

1.0

µs

tDSTBn

Pulse width of Data Strobe (DSTBn)

6.0

6.8

µs

tDI-latch

Acceptance of input data

10.5

12.5

µs

1 Parameter is only valid if the respective data port is configured as I/O pin.

2 The timing of the resulting voltage signal also depends on the external pull up resistor.

3 The input data must be stable within the period defined by min. and max. values of t

DI-latch.

4.8.2.

Input Data Pre-Processing

DSTBn

data port output data

D0..D3

keep stable

tDI-latch

min

max

data port input data

thold

tSTB

tDSTBn

Figure 7: Timing diagram data port D0 ... D3 and DSTBn

Besides the standard input function the Data Port offers different data pre-processing features that can be

activated by setting corresponding flags in the Firmware Area of the E²PROM.



Input Inverting

The input values of all four data input channels are inverted if the Invert_Data_In flag is set.



Input Delay

If the Delay Mode is activated, a new input value is returned to the master if equal input data was sampled for

two consecutive Data_Exchange cycles. As long as the condition is not true, previous valid data is returned.

To suppress undesired input data validation in case of immediately repeated Data_Exchange calls (i. e. AS-i

Masters immediately repeat one Data_Exchange requests if no valid slave response was received on the first

request) input data sampling is blocked for 256µs (-6.25%) after every sampling event.

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