80960HA datasheet(88/102 Pages) INTEL

88 / 102 page

80960HA/HD/HT

Advance Information Datasheet

SUPBAR

: out

bit;

TCK

: in

bit;

TDI

: in

bit;

TDO

: out

bit;

TMS

: in

bit;

TRST

: in

bit;

WAITBAR

: out

bit;

WRBAR

: out

bit;

XINTBAR

: in

bit_vector(0 to 7);

FIVEVREF

: linkage bit;

VCCPLL

: linkage bit;

VOLTDET

: out

bit;

VCC1

: linkage bit_vector(0 to 23);

VCC2

: linkage bit_vector(0 to 20);

VSS1

: linkage bit_vector(0 to 25);

VSS2

: linkage bit_vector(0 to 22);

: linkage bit_vector(0 to 4)

);

use STD_1149_1_1990.all;

use i960ha_a.all;

attribute PIN_MAP of Ha_Processor : entity is PHYSICAL_PIN_MAP;

constant PGA:PIN_MAP_STRING :=

“A

: (D16, D17, E16, E17, F17, G16, G17, H17, J17,”&

“

K17, L17, L16, M17, N17, N16, P17, Q17, P16,”&

“

P15, Q16, R17, R16, Q15, S17, R15, S16, Q14, ”&

“

R14, Q13, S15),

“ADSBAR

: R06,”&

“BEBAR

: (R09, S07, S06, S05),”&

“BLASTBAR

: S08,”&

“BOFFBAR

: B01,”&

“BREQ

: R13,”&

“BSTALL

: R12,”&

“BTERMBAR

: R04,”&

“CT

: (A11, A12, A13, A14),”&

“CLKIN

: C13,”&

Example 1. Boundary-Scan Description Language (BSDL) for PGA Package Example (Sheet 3 of 8)

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