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80960HA 数据表(PDF) 55 Page - Intel Corporation |
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80960HA 数据表(HTML) 55 Page - Intel Corporation |
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55 / 102 page ![]() 80960HA/HD/HT Advance Information Datasheet 49 Figure 32. Non-Burst, Non-Pipelined Requests without Wait States In ADS A31:2, SUP, D/C, LOCK, CT3:0 W/R BLAST DT/R DEN WAIT D31:0, CLKIN AD AD AD In Valid Valid Valid Burst Bus Width Odd Parity NXDA NWDD NWAD NRDD 29 28 21 24 23-22 20 12-8 19-16 15-14 7-6 4-0 Disabled 0 OFF 0 0 0000 X xx X x Enabled 1 0 00 0 00000 0 00 Disabled 0 0 00000 Out Function Bit Value BE3:0, DP3:0 PCHK External Ready Control Pipe- Lining Parity Enable NRAD NOTE: Bits 31-30, 27-25, 13, and 5 are reserved. PMCON |
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