80960HA datasheet(36/102 Pages) INTEL

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80960HA/HD/HT

Advance Information Datasheet

4.3

Recommended Connections

Power and ground connections must be made to multiple VCC and VSS (GND) pins. Every

80960Hx-based circuit board should include power (VCC) and ground (VSS) planes for power

distribution. Every VCC pin must be connected to the power plane; every VSS pin must be connected to

the ground plane. Pins identified as “NC” —no connect pins—must not be connected in the system.

Liberal decoupling capacitance should be placed near the 80960Hx. The processor can cause transient

power surges when its output buffers transition, particularly when connected to large capacitive loads.

Low inductance capacitors and interconnects are recommended for best high-frequency electrical

performance. Inductance can be reduced by shortening the board traces between the processor and

decoupling capacitors as much as possible. Capacitors specifically designed for PGA packages

offer the lowest possible inductance.

For reliable operation, always connect unused inputs to an appropriate signal level. In particular,

any unused interrupt (XINT7:0,NMI) input should be connected to VCC through a pull-up resistor,

as should BTERM if not used. Pull-up resistors should be in the range of 20 K

Ω for each pin tied

high. If READY or HOLD are not used, the unused input should be connected to ground. N.C. pins

must always remain unconnected.

4.4

VCC5 Pin Requirements (VDIFF)

In mixed-voltage systems that drive 80960Hx processor inputs in excess of 3.3 V, the VCC5 pin must

be connected to the system’s 5 V supply. To limit current flow into the VCC5 pin, there is a limit to

the voltage differential between the VCC5 pin and the other VCC pins. The voltage differential

between the 80960Hx VCC5 pin and its 3.3 V VCC pins should never exceed 2.25 V. This limit

applies to power-up, power-down, and steady-state operation. Table 20 outlines this requirement.

Meeting this requirement ensures proper operation and guarantees that the current draw into the

VCC5 pin does not exceed the ICC5 specification.

If the voltage difference requirements cannot be met due to system design limitations, an alternate

solution may be employed. As shown in Figure 7, a minimum of 100

Ω series resistor may be used

to limit the current into the VCC5 pin. This resistor ensures that current drawn by the VCC5 pin

does not exceed the maximum rating for this pin.

This resistor is not necessary in systems that can guarantee the VDIFF specification.

In 3.3 V-only systems and systems that drive 80960Hx pins from 3.3 V logic, connect the VCC5

pin directly to the 3.3 V VCC plane.

Figure 7. VCC5 Current-Limiting Resistor

+5 V (±0.25 V)

VCC5 Pin

100

Ω

(±5%, 0.5 W)

Table 20. VDIFF Specification for Dual Power Supply Requirements (3.3 V, 5 V)

Sym

Parameter

Min

Max

Units

Notes

VDIFF

VCC5-VCC

Difference

2.25

VCC5 input should not exceed VCC by more than 2.25 V during

power-up and power-down, or during steady-state operation.

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