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UPD703003 数据表(PDF) 75 Page - NEC |
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UPD703003 数据表(HTML) 75 Page - NEC |
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75 / 82 page ![]() 75 µPD703003 Data Sheet U12261EJ2V1DS00 A/D Converter Characteristics (TA = –40 to +85 °C, VDD = AVDD = 5 V ±10%, VSS = AVSS = 0 V) Parameter Symbol Conditions 25-MHz Version 33-MHz Version Units MIN. TYP. MAX. MIN. TYP. MAX. Resolution — 10 10 bit Total errorNote 1 — 4.5 V ≤ AVREF1 ≤ AVDD ±0.55 ±0.55 %FSR — 3.5 V ≤ AVREF1 ≤ AVDD ±0.7 ±0.7 %FSR Quantization error — ±1/2 ±1/2 LSB Conversion time tCONV 4.5 V ≤ AVREF1 ≤ AVDD 48 60 tCYK 3.5 V ≤ AVREF1 ≤ AVDD 48 60 tCYK Sampling time tSAMP 4.5 V ≤ AVREF1 ≤ AVDD 810 tCYK 3.5 V ≤ AVREF1 ≤ AVDD 810 tCYK Zero scale errorNote 1 — 4.5 V ≤ AVREF1 ≤ AVDD ±3.0 ±4.5 ±3.0 ±4.5 LSB — 3.5 V ≤ AVREF1 ≤ AVDD ±3.0 ±5.5 ±3.0 ±5.5 LSB Full scale errorNote 1 — 4.5 V ≤ AVREF1 ≤ AVDD ±1.5 ±2.5 ±1.5 ±2.5 LSB — 3.5 V ≤ AVREF1 ≤ AVDD ±1.5 ±4.5 ±1.5 ±4.5 LSB Nonlinearity errorNote 1 — 4.5 V ≤ AVREF1 ≤ AVDD ±1.5 ±3.5 ±1.5 ±3.5 LSB — 3.5 V ≤ AVREF1 ≤ AVDD ±1.5 ±4.5 ±1.5 ±4.5 LSB Analog input VIAN –0.3 AVDD –0.3 AVDD V voltageNote 2 +0.3 +0.3 Reference voltage AVREF1 3.5 AVDD 3.5 AVDD V AVREF1 current AIREF1 1.2 3.0 1.2 3.0 mA AVDD power supply AIDD 2.3 6.0 2.3 6.0 mA current Notes 1. Does not include quantization error. 2. When VIAN = 0, the conversion result becomes 000H. When 0 < VIAN < AVREF1, conversion has 10-bit resolution. When AVREF1 ≤ VIAN ≤ AVDD, the conversion result becomes 3FFH. |
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