UPD703003 datasheet(21/82 Pages) NEC

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UPD703003 数据表(PDF) 21 Page - NEC

部件名	UPD703003

功能描述	V853TM 32/16-BIT SINGLE-CHIP MICROCONTROLLER

PDF	82 Pages

Scroll/Zoom	100%

制造商	NEC [NEC]

网页	http://www.nec.com/

标志

21 / 82 page

µPD703003

Data Sheet U12261EJ2V1DS00

7. CLOCK GENERATION FUNCTIONS

The features of the clock generation functions are shown below.

• Multiplier function using PLL clock synthesizer

• Clock sources

• Oscillation via resonator connection (PLL mode): fXX =

φ, 2 × φ, φ/5

• External clock (PLL mode): fXX =

φ, 2 × φ, φ/5

• External clock (direct mode): fXX = 2

• Power saving control

• HALT mode

• IDLE mode

• Software STOP mode

• Clock output inhibit mode

The configuration of the clock generation functions is shown below.

Figure 7-1. Block Diagram of Clock Generation Functions

CKSEL

(fXX)

CLKOUT

CPU, On-chip peripheral I/O

Clock generator

Remark

φ : internal system clock

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