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UPD703003 数据表(PDF) 10 Page - NEC |
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UPD703003 数据表(HTML) 10 Page - NEC |
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10 / 82 page ![]() µPD703003 10 Data Sheet U12261EJ2V1DS00 (2/2) Pin Name I/O Function Alternate Function Pin SCK0 I/O Serial clock I/O (3-wire) for CSI0 to CSI3 P24 SCK1 P27 SCK2 P17/INTP123 SCK3 P37/INTP133 TXD0 Output Serial transmit data output for UART0 and UART1 P22/SO0 TXD1 P25/SO1 RXD0 Input Serial receive data input for UART0 and UART1 P23/SI0 RXD1 P26/SI1 PWM0 Output PWM pulse signal output P20 PWM1 P21 AD0 to AD7 I/O 16-bit multiplexed address/data bus for external memory expansion P40 to P47 AD8 to AD15 P50 to P57 A16 to A19 Output High-order address bus used for external memory expansion P60 to P63 LBEN Output External data bus’s low-order byte enable signal output P90 UBEN External data bus’s high-order byte enable signal output P91 R/W Output External read/write status output P92 DSTB External data strobe signal output P93 ASTB External address strobe signal output P94 HLDAK Output Bus hold acknowledge output P95 HLDRQ Input Bus hold request input P96 ANI0 to ANI7 Input Analog input to A/D converter P70 to P77 ANO0, ANO1 Output Analog output to D/A converter — NMI Input Nonmaskable interrupt request input — CLKOUT Output System clock output — CKSEL Input Input for specifying clock generator’s operation mode CVDD WAIT Input Control signal input for inserting wait in bus cycle — MODE Input Operation mode select — RESET Input System reset input — X1 Input Oscillator connection for system clock. Input is via X1 when using an — X2 — external clock. — ADTRG Input A/D converter external trigger input P07/INTP113 AVREF1 Input Reference voltage input for A/D converter — AVREF2 Input Reference voltage input for D/A converter — AVREF3 — AVDD — Positive power supply for A/D converter — AVSS — Ground potential for A/D converter — CVDD — Positive power supply for on-chip clock generator CKSEL CVSS — Ground potential for on-chip clock generator — VDD — Positive power supply — VSS — Ground potential — IC — Internally connected pin (connect directly to VSS)— |
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