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UPD703003 数据表(PDF) 11 Page - NEC |
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UPD703003 数据表(HTML) 11 Page - NEC |
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11 / 82 page ![]() 11 µPD703003 Data Sheet U12261EJ2V1DS00 2.3 I/O Circuits of Pins and Processing of Unused Pins Table 2-1 lists I/O circuit type of respective pins and processing method (recommended connection method) when not used. Figure 2-1 illustrates the various circuit types using partially abridged diagrams. When connecting to VDD or VSS via a resistor, a resistance value in the range of 1 to 10 k Ω is recommended. Table 2-1. I/O Circuits of Pins and Processing of Unused Pins (1/2) Pin I/O Circuit Type Recommended Connection Method P00/TO110, P01/TO111 5 Input: Connect to VDD or VSS separately via a resistor P02/TCLR11, P03/TI11, 8 Output: Leave open P04/INTP110 to P07/INTP113/ADTRG P10/TO120, P11/TO121 5 P12/TCLR12, P13/TI12 8 P14/INTP120 P15/INTP121/SO2 P16/INTP122/SI2 P17/INTP123/SCK2 P20/PWM0, P21/PWM1 5 P22/TXD0/SO0 P23/RXD0/SI0, P24/SCK0 8 P25/TXD1/SO1 5 P26/RXD1/SI1, P27/SCK1 8 P30/TO130, P31/TO131 5 P32/TCLR13, P33/TI13 8 P34/INTP130 P35/INTP131/SO3 10-A P36/INTP132/SI3 P37/INTP133/SCK3 P40/AD0 to P47/AD7 5 P50/AD8 to P57/AD15 P60/A16 to P63/A19 P70/ANI0 to P77/ANI7 9 Connect directly to VSS P90/LBEN 5 Input: Connect to VDD or VSS separately via a resistor P91/UBEN Output: Leave open P92/R/W P93/DSTB P94/ASTB P95/HLDAK P96/HLDRQ P110/TO140, P111/TO141 P112/TCLR14, P113/TI14 8 P114/INTP140 to P117/INTP143 ANO0, ANO1 12 Leave open NMI 2 Connect directly to VSS |
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