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PM0215 数据表(PDF) 69 Page - STMicroelectronics |
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PM0215 数据表(HTML) 69 Page - STMicroelectronics |
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69 / 91 page  PM0215 Core peripherals Doc ID 022979 Rev 1 69/91 4 Core peripherals 4.1 About the STM32 Cortex-M0 core peripherals The address map of the Private peripheral bus (PPB) is: In register descriptions, register type is described as follows: ● RW: Read and write. ● RO: Read-only. ● WO: Write-only. Table 24. STM32 core peripheral register regions Address Core peripheral Description 0xE000E008-0xE000E00F System control block (SCB) Table 32 on page 84 0xE000E010-0xE000E01F SysTick timer (STK) Table 34 on page 89 0xE000E100-0xE000E4EF Nested vectored interrupt controller (NVIC) Table 29 on page 76 0xE000ED00-0xE000ED3F System control block (SCB) Table 32 on page 84 0xE000EF00-0xE000EF03 Nested vectored interrupt controller (NVIC) Table 29 on page 76 |
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