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PM0215 数据表(PDF) 18 Page - STMicroelectronics |
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PM0215 数据表(HTML) 18 Page - STMicroelectronics |
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18 / 91 page  The STM32 Cortex-M0 processor PM0215 18/91 Doc ID 022979 Rev 1 2.2 Memory model This section describes the processor memory map, and the behavior of memory accesses. The processor has a fixed memory map that provides up to 4 GB of addressable memory. Figure 6. Memory map The processor reserves regions of the Private peripheral bus (PPB) address range for core peripheral registers, see Section 4.1: About the STM32 Cortex-M0 core peripherals on page 69. ([WHUQDOGHYLFH ([WHUQDO5$0 3HULSKHUDO 65$0 &RGH [)))))))) 3ULYDWHSHULSKHUDOEXV [( [())))) [ ))))))) [$ [))))))) [ [))))))) [ [))))))) [ [ *% *% *% *% *% ['))))))) [( 0% 0% 'HYLFH |
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