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PM0215 数据表(PDF) 84 Page - STMicroelectronics |
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PM0215 数据表(HTML) 84 Page - STMicroelectronics |
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84 / 91 page  Core peripherals PM0215 84/91 Doc ID 022979 Rev 1 4.3.7 SCB usage hints and tips Ensure software uses aligned 32-bit word size transactions to access all the system control block registers. 4.3.8 SCB register map The table provides shows the System control block register map and reset values. The base address of the SCB register block is 0xE000 ED00 for register described in Table 32. Table 32. SCB register map and reset values Offset Register 0x00 CPUID Implementer Variant Constant PartNo Revision Reset Value 0 10000010001111111 0000 100 0110 001 0x04 ICSR Reser ved Reser ved Reserved VECTPENDING[5:0] Reset Value 0 0000 0 0000 00 000 000 0x0C AIRCR VECTKEY[15:0] Reserved Reset Value 0 0000001111110100 000 0x10 SCR Reserved Reset Value 00 0 0x14 CCR Reserved Reset Value 11 0x1C SHPR2 PRI11 Reserved Reset Value 0 0000000 0x20 SHPR3 PRI15 PRI14 Reserved Reset Value 0 000000000000000 |
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