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PM0215 数据表(PDF) 48 Page - STMicroelectronics |
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PM0215 数据表(HTML) 48 Page - STMicroelectronics |
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48 / 91 page ![]() The STM32 Cortex-M0 instruction set PM0215 48/91 Doc ID 022979 Rev 1 3.5 General data processing instructions Table 19 shows the data processing instructions. Table 19. Data processing instructions Mnemonic Brief description See ADCS Add with carry ADD{S}, ADCS, SUB{S}, SBCS, and RSBS on page 49 ADD(S) Add ADD{S}, ADCS, SUB{S}, SBCS, and RSBS on page 49 ANDS Logical AND ANDS, ORRS, EORS and BICS on page 51 ASRS Arithmetic shift right ASRS, LSLS, LSRS and RORS on page 52 BICS Bit clear ANDS, ORRS, EORS and BICS on page 51 CMN Compare negative CMP and CMN on page 53 CMP Compare CMP and CMN on page 53 EORS Exclusive OR ANDS, ORRS, EORS and BICS on page 51 LSLS Logical shift left ASRS, LSLS, LSRS and RORS on page 52 LSRS Logical shift right ASRS, LSLS, LSRS and RORS on page 52 MOV(S) Move MOV, MOVS and MVNS on page 54 MULS Multiply MULS on page 55 MVNS Move NOT MOV, MOVS and MVNS on page 54 ORRS Logical OR ANDS, ORRS, EORS and BICS on page 51 REV Reverse byte order in a word REV, REV16, and REVSH on page 56 REV16 Reverse byte order in each halfword REV, REV16, and REVSH on page 56 REVSH Reverse byte order in bottom halfword and sign extend REV, REV16, and REVSH on page 56 RORS Rotate right ASRS, LSLS, LSRS and RORS on page 52 RSBS Reverse subtract ADD{S}, ADCS, SUB{S}, SBCS, and RSBS on page 49 SBCS Subtract with carry ADD{S}, ADCS, SUB{S}, SBCS, and RSBS on page 49 SUBS Subtract ADD{S}, ADCS, SUB{S}, SBCS, and RSBS on page 49 SUBW Subtract ADD{S}, ADCS, SUB{S}, SBCS, and RSBS on page 49 SXTB Sign extends to 32 bits SXTB, SXTH, UXTB and UXTH on page 57 SXTH Sign extends to 32 bits SXTB, SXTH, UXTB and UXTH on page 57 UXTB Zero extends to 32 bits SXTB, SXTH, UXTB and UXTH on page 57 UXTH Zero extends to 32 bits SXTB, SXTH, UXTB and UXTH on page 57 TST Test TST on page 58 |
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