CMX608 datasheet(29/70 Pages) CMLMICRO

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RALCWI Vocoder

CMX608/CMX618/CMX638

 2014 CML Microsystems Plc

D/608_18_38/11

5.9.

C-BUS Interface

This block provides for the transfer of data and control or status information between the internal registers

of the CMX608/CMX618/CMX638 and the host µC, by using the C-BUS serial bus. Each transaction

consists of a single Register Address byte sent from the µC, which may be followed by a data word sent

from the µC (written into one of the Write-Only Registers), or a data word sent to the µC (read out from

one of the Read-Only Registers). All C-BUS data words are a multiple of 8 bits wide, the width depending

on the source or destination register. Note that certain C-BUS transactions require only an address byte to

be sent from the µC, no data transfer being required. The operation of the C-BUS is illustrated in Figure

16.

Data sent from the µC on the CDATA (command data) line is clocked into the CMX608/CMX618/CMX638

on the rising edge of the CLK input. Data sent from the CMX608/CMX618/CMX638 to the µC on the

RDATA (reply data) line is valid when CLK is high. The CSN line must be held low during a data transfer

and kept high between transfers. The C-BUS interface is compatible with most common µC serial

interfaces and may also be easily implemented with general purpose µC I/O pins controlled by a simple

software routine. Figure 18 gives detailed C-BUS timing requirements.

C-BUS single byte command (no data)

Note:

The CLK line may be high or

low at the start and end of each

transaction.



= Level not important

C-BUS n-bit register write (n, a multiple of 8, depends on the type of C-BUS transaction)

CSN

CLK

CDATA

n-1 n-2 n-3

MSB

Address

LSB

MSB

Write data

LSB

RDATA Hi-Z

C-BUS n-bit register read (n, a multiple of 8, depends on the type of C-BUS transaction)

CSN

CLK

CDATA

MSB

Address

LSB

RDATA Hi-Z

n-1 n-2 n-3

MSB

Read data

LSB

Figure 16 Basic C-BUS Transactions

CSN

CLK

CDATA

MSB

Address

LSB

RDATA Hi-Z

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