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CMX608 数据表(PDF) 35 Page - CML Microcircuits |
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CMX608 数据表(HTML) 35 Page - CML Microcircuits |
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35 / 70 page ![]() RALCWI Vocoder CMX608/CMX618/CMX638 2014 CML Microsystems Plc 35 D/608_18_38/11 VCFG register address $07 (also MVCFG register address $2C) 7 6 5 4 3 2 1 0 DTMFF DTX HDD FEC BITRATE FRAMES This write-only register controls the configuration of the Vocoder. Certain aspects of the Vocoder will be set up and initialised. The VCFG register is mirrored by the MVCFG register ($2C). This read-only register holds the last value written to the VCFG ($07) register. The MVCFG register is updated before the value is validated and therefore may be used as confirmation that a write command to a 8-bit C-BUS register is working. The VCFG command should only be issued when the device is not actively encoding, decoding or performing an FEC loop, i.e when bits 0 to 2 of the VCTRL register ($11) are '0'. After this command has completed, bit 15 of the STATUS register ($40) will be set and, if enabled, IRQN will go low. No other C-BUS registers should be read or written whilst this command is in progress. If the command was successful, the value '1' will be written into the SVCACK register ($2E). If the command was unsuccessful due to an invalid bit rate or due to it being issued when the device is active, the value '0' will be written into the SVCACK register. Also see Table 6 and Table 7 for a description of the VCFG register configuration for the various decoder and encoder packet sizes. Bits 1 and 0 Specifies the number of 20ms frames transferred according to the following table: FRAMES Bit 1 Bit 0 Description 0 0 4 off 20ms frames 0 1 1 off 20ms frames 1 0 2 off 20ms frames 1 1 3 off 20ms frames Bits 3 and 2 Specifies the Vocoder bit rate according to the following table: BITRATE Note that programming both bit 2 and bit 3 to '1' will cause this command to fail. i.e. An invalid bit rate. Bit 3 Bit 2 Description 0 0 reserved 0 1 2400 bits per second 1 0 2750 bits per second 1 1 Not used Bit 4 If this bit is set to '1', an FEC encoded packet will be produced by the encoder, FEC and an FEC encoded packet will be expected by the decoder. If this bit is cleared to '0', packets of raw Vocoder frames will be produced and expected. FEC is only available when 3 or 4 frame packets are being transferred. This bit will be ignored for any other frames setting. See also section 6.2. |
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