CMX608 datasheet(55/70 Pages) CMLMICRO

55 / 70 page

RALCWI Vocoder

CMX608/CMX618/CMX638

 2014 CML Microsystems Plc

D/608_18_38/11

Application Notes

6.1.

Basic Operation of the Vocoder

This sequence of instructions assumes that the device is in its reset state and that the ENABXTAL pin is

set to '1'. The device may be reset, either by pulling the RESETN (pin 30) to '0' and then to '1', or by writing

to the RESET register ($01). The device will be ready to accept commands approximately 1.5 milliseconds

after a soft reset and will indicate that it is ready by setting bit 15 of the STATUS register ($40) to '1' and

also by indicating a C-BUS interrupt request (if enabled) by setting the IRQN pin to '0'.

The CMX608/CMX618/CMX638 device is for use in either an interrupt driven or a polled system. It will

indicate that it needs attention by setting a bit in the STATUS register and, if enabled, by taking the IRQN

pin to '0', thus generating an interrupt.

Initialisation:

Enable interrupts and establish internal processor speed

Write $C107 into the IRQENAB register ($1F)

Write $0005 into the CLOCK register ($1D)

Write $00 into the DTMFATTEN register ($0A).

Wait for a C-BUS interrupt or poll the STATUS register ($40) until bit 14 (SVC) is set to '1'.

For this example, all available interrupts have been enabled and the slow processor speed has

been selected with no DTMF attenuation.

Turn on BIAS and internal A/D and D/A converter (CMX618/CMX638 only)

Write $03 into the POWERSAVE register ($09).

Using the recommended 100nF bias capacitor: 100ms is required for the bias to reach its final

level.

Configure Vocoder

Write $37 into the VCFG register ($07).

This sets the Vocoder up to encode and decode 60ms packets of voice, using a Vocoder rate of

2400 bps data and 1200 bps FEC. Frames for decoding are expected to be hard bits.

Wait for configuration to complete

Wait for a C-BUS interrupt or poll the STATUS register ($40) until bit 15 is set.

Read the SVCACK register ($2E) and check that bit 0 is set to '1', which indicates that the device

has accepted the configuration. If this bit is not set to '1', it indicates that an incorrect value was

written to VCFG register.

The host should now wait for up to 100ms, to allow the bias capacitor to finish charging.

The device is now in a position to encode or decode. Step 5 or step 8 may now be executed.

Encoding:

Start encoder running (stop decoder if it was running)

Write $0002 into the VCTRL register ($11).

This tells the Vocoder to start collecting audio samples for encoding. If the device was previously

decoding, the decoder will be disabled and audio output will cease.

Wait for control command to complete

Wait for a C-BUS interrupt, or poll the STATUS register ($40) until bit 15 is set to '1'.

CMX608 数据表(PDF) 55 Page - CML Microcircuits

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