CMX608 datasheet(38/70 Pages) CMLMICRO

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RALCWI Vocoder

CMX608/CMX618/CMX638

 2014 CML Microsystems Plc

D/608_18_38/11

Bit 4

Setting this bit to '1' will reduce the internal clock rate to a quarter of its normal

THROTTLE

frequency when the device is not actively encoding or decoding.

Clearing this bit to '0' will leave the internal clock rate at its normal frequency.

This bit should be cleared to '0' in the CMX638, when using full-duplex operation.

When the clock is throttled down, the device will take up to 4 times longer to

complete any C-BUS command.

Note: The maximum C-BUS CLK frequency that should be used when this bit is

set to '1' is 4MHz.

Bits 5 to 7

These bits are not used and must be cleared to '0'.

DTMFATTEN register address $0A

Attenuation

This is a dual-purpose register. Its primary function is to set an attenuation value for regenerated

DTMF tones. Its secondary function is to execute a change in the clock frequency of the internal

processor. For more information about the clock, please refer to the CLOCK register ($1D)

description.

When DTMF is sent through a vocoded channel, only the code is transferred and no amplitude

information is transferred. If the decoder is reproducing the DTMF tones in the audio stream, the

level at which they are produced may be too loud compared to any voice. This register allows the

volume to be reduced to an appropriate level.

This write-only register controls the attenuation of the generated DTMF audio tones.

Without

attenuation, DTMF tones will be generated with an amplitude of approximately half scale (6dB

down from the maximum amplitude that can be achieved with 16-bit samples). The value written

by this register is a count of right shifts to be applied to any DTMF tones that are generated. This

effectively gives attenuation steps of 6dB. Bit 7 is the msb.

After writing to this register, bit 14 (SVC) of the STATUS register ($40) will be set to '1' and, if

enabled, IRQN will go low. No other C-BUS registers should be read or written whilst this

command is in progress.

Before using the DTMFATTEN register, the CLOCK register ($1D) must be programmed with a

valid value. Please refer to the CLOCK register description.

EXCODECCONT register address $0B

SEL1

SEL0

This write-only register is used to control an external CODEC.

The CMX608 (and

CMX618/CMX638 with external CODEC selected) has built-in drivers for a popular type of

CODEC:

Burr Brown (Texas Instruments) PCM3500

Other types of CODEC may be used with this device, see section 5.6 for further details.

This register is split into four sub-registers, indicated by 'n' in bits 5 to 0 above. The sub-register

written depends on the value of the SEL1 and SEL0 bits. In all cases, after this register has been

written and the action completed, bit 15 of the STATUS register ($40) will be set and, if enabled,

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