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PIC16LC554 数据表(PDF) 48 Page - Microchip Technology |
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PIC16LC554 数据表(HTML) 48 Page - Microchip Technology |
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48 / 96 page  PIC16C55X(A) DS40143B-page 48 Preliminary © 1997 Microchip Technology Inc. FIGURE 7-14: WATCHDOG TIMER BLOCK DIAGRAM FIGURE 7-15: SUMMARY OF WATCHDOG TIMER REGISTERS Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 2007h Config. bits — + CP1 CP0 PWRTE WDTE FOSC1 FOSC0 81h OPTION RBPU INTEDG T0CS T0SE PSA PS2 PS1 PS0 Legend: Shaded cells are not used by the Watchdog Timer. — = Unimplemented location, read as ‘0’. + = Reserved for future use. From TMR0 Clock Source (Figure 6-6) To TMR0 (Figure 6-6) Postscaler Watchdog Timer M U X PSA 8 - to -1 MUX PSA WDT Time-out 1 0 0 1 WDT Enable Bit PS<2:0> • • Note: T0SE, T0CS, PSA, PS0-PS2 are bits in the OPTION register. 8 MUX |
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