PIC16LC554 datasheet(87/96 Pages) MICROCHIP

87 / 96 page

Preliminary

DS40143B-page 87

PIC16C55X(A)

APPENDIX A: ENHANCEMENTS

The following are the list of enhancements over the

PIC16C5X microcontroller family:

Instruction word length is increased to 14 bits.

This allows larger page sizes both in program

memory (4K now as opposed to 512 before) and

bytes before).

A PC high latch register (PCLATH) is added to

handle program memory paging. PA2, PA1, PA0

bits are removed from STATUS register.

Data memory paging is slightly redeﬁned.

STATUS register is modiﬁed.

Four

new

instructions

have

been

added:

RETURN

, RETFIE, ADDLW, and SUBLW.

Two instructions TRIS and OPTION are being

phased

out

although

they

are

kept

for

compatibility with PIC16C5X.

OPTION

and

TRIS

registers

are

made

addressable.

Interrupt capability is added. Interrupt vector is

at 0004h.

Stack size is increased to 8 deep.

Reset vector is changed to 0000h.

Reset of all registers is revised. Three different

reset (and wake-up) types are recognized.

Registers are reset differently.

10. Wake up from SLEEP through interrupt is

added.

11. Two separate timers, Oscillator Start-up Timer

(OST)

and

Power-up

Timer

(PWRT)

are

included for more reliable power-up. These

timers

are

invoked

selectively

avoid

unnecessary delays on power-up and wake-up.

12. PORTB has weak pull-ups and interrupt on

change feature.

13. Timer0 clock input, T0CKI pin is also a port pin

(RA4/T0CKI) and has a TRIS bit.

14. FSR is made a full 8-bit register.

15. “In-circuit programming” is made possible. The

user can program PIC16C55X devices using

only ﬁve pins: VDD, VSS, VPP, RB6 (clock) and

RB7 (data in/out).

16. PCON

status

added

with

Power-on-Reset (POR) status bit.

17. Code protection scheme is enhanced such that

portions of the program memory can be

protected, while the remainder is unprotected.

18. PORTA inputs are now Schmitt Trigger inputs.

APPENDIX B: COMPATIBILITY

convert

code

written

for

PIC16C5X

PIC16C55X(A), the user should take the following

steps:

Remove any program memory page select

operations (PA2, PA1, PA0 bits) for CALL, GOTO.

Revisit any computed jump operations (write to

PC or add to PC, etc.) to make sure page bits

are set properly under the new scheme.

Eliminate any data memory page switching.

Redeﬁne data variables to reallocate them.

Verify all writes to STATUS, OPTION, and FSR

registers since these have changed.

Change reset vector to 0000h.

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