PIC16LC554 datasheet(19/96 Pages) MICROCHIP

19 / 96 page

Preliminary

DS40143B-page 19

PIC16C55X(A)

4.2.2.3

INTCON REGISTER

The INTCON register is a readable and writable

for all interrupt sources.

Note:

Interrupt ﬂag bits get set when an interrupt

condition occurs regardless of the state of

its corresponding enable bit or the global

enable bit, GIE (INTCON<7>).

FIGURE 4-8:

INTCON REGISTER (ADDRESS 0BH OR 8BH)

R/W-0

Reserved

R/W-0

R/W-x

GIE

—

T0IE

INTE

RBIE

T0IF

INTF

RBIF

= Readable bit

W = Writable bit

- n = Value at POR reset

- x = Unknown at POR reset

bit7

bit0

bit 7:

GIE: Global Interrupt Enable bit

1 = Enables all un-masked interrupts

0 = Disables all interrupts

bit 6:

— =

Reserved for future use. Always maintain this bit clear.

bit 5:

T0IE: TMR0 Overﬂow Interrupt Enable bit

1 = Enables the TMR0 interrupt

0 = Disables the TMR0 interrupt

bit 4:

INTE: RB0/INT External Interrupt Enable bit

1 = Enables the RB0/INT external interrupt

0 = Disables the RB0/INT external interrupt

bit 3:

RBIE: RB Port Change Interrupt Enable bit

1 = Enables the RB port change interrupt

0 = Disables the RB port change interrupt

bit 2:

T0IF: TMR0 Overﬂow Interrupt Flag bit

1 = TMR0 register has overﬂowed (must be cleared in software)

0 = TMR0 register did not overﬂow

bit 1:

INTF: RB0/INT External Interrupt Flag bit

1 = The RB0/INT external interrupt occurred (must be cleared in software)

0 = The RB0/INT external interrupt did not occur

bit 0:

RBIF: RB Port Change Interrupt Flag bit

1 = When at least one of the RB7:RB4 pins changed state (must be cleared in software)

0 = None of the RB7:RB4 pins have changed state

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