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PIC16LC554 数据表(PDF) 90 Page - Microchip Technology |
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PIC16LC554 数据表(HTML) 90 Page - Microchip Technology |
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90 / 96 page ![]() PIC16C55X(A) DS40143B-page 90 Preliminary © 1997 Microchip Technology Inc. Power-On Reset (POR) ...................................................... 40 Power-up Timer (PWRT)..................................................... 40 Prescaler ............................................................................. 32 PRO MATE ® II Universal Programmer............................... 63 Program Memory Organization ........................................... 13 Q Quick-Turnaround-Production (QTP) Devices ...................... 7 R RC Oscillator ....................................................................... 38 Reset................................................................................... 39 RETFIE Instruction.............................................................. 59 RETLW Instruction .............................................................. 59 RETURN Instruction............................................................ 60 RLF Instruction.................................................................... 60 RRF Instruction ................................................................... 60 S SEEVAL ® Evaluation and Programming System............... 65 Serialized Quick-Turnaround-Production (SQTP) Devices ... 7 SLEEP Instruction ............................................................... 60 Software Simulator (MPLAB-SIM)....................................... 65 Special Features of the CPU............................................... 35 Special Function Registers ................................................. 16 Stack ................................................................................... 21 Status Register.................................................................... 17 SUBLW Instruction.............................................................. 61 SUBWF Instruction.............................................................. 61 SWAPF Instruction.............................................................. 62 T Timer0 TIMER0 ....................................................................... 29 TIMER0 (TMR0) Interrupt ........................................... 29 TIMER0 (TMR0) Module ............................................. 29 TMR0 with External Clock........................................... 31 Timer1 Switching Prescaler Assignment................................. 33 Timing Diagrams and Specifications................................... 74 TMR0 Interrupt .................................................................... 46 TRIS Instruction .................................................................. 62 TRISA.................................................................................. 23 TRISB.................................................................................. 25 W Watchdog Timer (WDT) ...................................................... 47 X XORLW Instruction ............................................................. 62 XORWF Instruction ............................................................. 62 LIST OF EXAMPLES Example 3-1: Instruction Pipeline Flow .................... 12 Example 4-1: Ndirect Addressing............................. 22 Example 5-1: Read-Modify-Write Instructions on an I/O Port..................................... 27 Example 6-1: Changing Prescaler (Timer0 →WDT)................................... 33 Example 6-2: Changing prescaler (WDT →Timer0)................................... 33 Example 7-1: Saving the Status and W Registers in RAM ............................................. 47 LIST OF FIGURES Figure 3-1: BlocK Diagram ........................................... 10 Figure 3-2: Clock/Instruction Cycle ............................... 12 Figure 4-1: Program Memory Map and Stack for the PIC16C554/PIC6C554(A) .......................... 13 Figure 4-2: Program Memory Map and Stack for the PIC16C556(A) ............................................ 13 Figure 4-3: Program Memory Map and Stack for the PIC16C558/PIC16C558(A) ........................ 13 Figure 4-4: Data Memory Map for the PIC16C554/554(A) ..................................... 15 Figure 4-5: Data Memory Map for the PIC16C558/558(A) ..................................... 15 Figure 4-6: STATUS Register (Address 03h or 83h) ................................................. 17 Figure 4-7: OPTION Register (address 81h) ................ 18 Figure 4-8: INTCON Register (address 0Bh or 8Bh)........................................................ 19 Figure 4-9: PCON Register (Address 8Eh)................... 20 Figure 4-10: Loading Of PC In Different Situations ........ 21 Figure 4-11: Direct/indirect Addressing PIC16C55X(A)............................................ 22 Figure 5-1: Block Diagram of PORT pins RA<3:0>................................... 23 Figure 5-2: Block Diagram of RA4 Pin .......................... 23 Figure 5-3: Block Diagram of RB7:RB4 Pins ................ 25 Figure 5-4: Block Diagram of RB3:RB0 Pins ................ 25 Figure 5-5: Successive I/O Operation........................... 27 Figure 6-1: TIMER0 Block Diagram .............................. 29 Figure 6-2: TIMER0 (TMR0) Timing: Internal Clock/No PrescaleR ................................... 29 Figure 6-3: TIMER0 Timing: Internal Clock/ Prescale 1:2 ............................................... 30 Figure 6-4: TIMER0 Interrupt Timing ............................ 30 Figure 6-5: TIMER0 Timing With External Clock .......... 31 Figure 6-6: Block Diagram of thE Timer0/WDT Prescaler .................................................... 32 Figure 7-1: Configuration Word .................................... 36 Figure 7-2: Crystal Operation (or Ceramic Resonator) (HS, XT or LP Osc Configuration) .............. 37 Figure 7-3: External Clock Input Operation (HS, XT or LP Osc Configuration) .............. 37 Figure 7-4: External Parallel Resonant Crystal Oscillator Circuit ......................................... 38 Figure 7-5: External Series Resonant Crystal Oscillator Circuit ......................................... 38 Figure 7-6: RC Oscillator Mode .................................... 38 Figure 7-7: Simplified Block Diagram of On-chip Reset Circuit ............................................... 39 Figure 7-8: Time-out Sequence on Power-up (MCLR not tied to VDD): Case 1 ................. 43 Figure 7-9: Time-out Sequence on Power-up (MCLR not tied to VDD): Case 2 ................. 43 Figure 7-10: Time-out Sequence on Power-up (MCLR tied to VDD)..................................... 43 Figure 7-11: External Power-on Reset Circuit (For Slow VDD Power-up) ........................... 44 Figure 7-12: Interrupt Logic ............................................ 45 Figure 7-13: INT Pin Interrupt Timing ............................. 46 Figure 7-14: Watchdog Timer Block Diagram................. 48 Figure 7-15: Summary of Watchdog Timer Registers .................................................... 48 Figure 7-16: Wake-up from Sleep Through Interrupt ...................................................... 49 Figure 7-17: Typical In-Circuit Serial Programming Connection ................................................. 50 |
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