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PIC16F84A 数据表(PDF) 43 Page - Microchip Technology |
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PIC16F84A 数据表(HTML) 43 Page - Microchip Technology |
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43 / 68 page ![]() PIC16F84A © 1998 Microchip Technology Inc. Preliminary DS35007A-page 43 9.1 DC CHARACTERISTICS: PIC16F84A-04 (Commercial, Industrial) PIC16F84A-20 (Commercial, Industrial) DC Characteristics Power Supply Pins Standard Operating Conditions (unless otherwise stated) Operating temperature 0 °C ≤ TA ≤ +70°C (commercial) -40 °C ≤ TA ≤ +85°C (industrial) Parameter No. Sym Characteristic Min Typ† Max Units Conditions D001 D001A VDD Supply Voltage 4.0 4.5 — — 5.5 5.5 V V XT, RC and LP osc configuration HS osc configuration D002* VDR RAM Data Retention Voltage (Note 1) 1.5* — — V Device in SLEEP mode D003 VPOR VDD Start Voltage to ensure internal Power-on Reset signal —VSS — V See section on Power-on Reset for details D004* D004A* SVDD VDD Rise Rate to ensure internal Power-on Reset signal 0.05* TBD — — — — V/ms PWRT enabled (PWRTE bit clear) PWRT disabled (PWRTE bit set) See section on Power-on Reset for details D010 D010A D013 IDD Supply Current (Note 2) — — — 1.8 3 10 4.5 10 20 mA mA mA RC and XT osc configuration (Note 4) FOSC = 4.0 MHz, VDD = 5.5V FOSC = 4.0 MHz, VDD = 5.5V (During Flash programming) HS osc configuration (PIC16F84A-20) FOSC = 20 MHz, VDD = 5.5V D020 D021 D021A IPD Power-down Current (Note 3) — — — 7.0 1.0 1.0 28 14 16 µA µA µA VDD = 4.0V, WDT enabled, industrial VDD = 4.0V, WDT disabled, commercial VDD = 4.0V, WDT disabled, industrial D022* ∆IWDT Module Differential Current (Note 5) Watchdog Timer — — 6.0 — 20* 25* µA µA WDTE bit set, VDD = 4.0V, commercial WDTE bit set, VDD = 4.0V, extended * These parameters are characterized but not tested. † Data in "Typ" column is at 5.0V, 25˚C unless otherwise stated. These parameters are for design guidance only and are not tested. Note 1: This is the limit to which VDD can be lowered without losing RAM data. 2: The supply current is mainly a function of the operating voltage and frequency. Other factors such as I/O pin loading and switching rate, oscillator type, internal code execution pattern, and temperature also have an impact on the current consumption. The test conditions for all IDD measurements in active operation mode are: OSC1=external square wave, from rail to rail; all I/O pins tristated, pulled to VDD, T0CKI = VDD, MCLR = VDD; WDT enabled/disabled as specified. 3: The power down current in SLEEP mode does not depend on the oscillator type. Power-down current is measured with the part in SLEEP mode, with all I/O pins in hi-impedance state and tied to VDD and VSS. 4: For RC osc configuration, current through Rext is not included. The current through the resistor can be esti- mated by the formula IR = VDD/2Rext (mA) with Rext in kOhm. 5: The ∆ current is the additional current consumed when this peripheral is enabled. This current should be added to the base IDD measurement. |
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