MEC1322 datasheet(101/456 Pages) MICROCHIP

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DS00001719D-page 101

MEC1322

Note 1:

If accessing the Global Configuration Registers, step (a) is not required.

Any write to an undefined or reserved Configuration register is terminated normally on the LPC bus without

any modification of state in the MEC1322. Any read to an undefined or reserved Configuration register

returns FFh.

The following sections define the Global Configuration registers and the Logical Configuration registers.

6.7.1

GLOBAL CONTROL/CONFIGURATION REGISTERS

As with all Configuration Registers, the INDEX PORT is used to select a Global Configuration Register in the chip. The

DATA PORT is then used to access the selected register. The INDEX and DATA PORTs are defined in the LPC Interface

description.

The Host can access all the Global Configuration registers at the offsets listed in Table 6-4, "Chip-Level (Global) Con-

trol/Configuration Registers" through the INDEX PORT and the DATA PORT.

The EC can access all the Global Configuration registers at the offsets listed in Table 6-4, "Chip-Level (Global) Con-

trol/Configuration Registers" from the base address shown in Table 6-6, “EC-Only Register Address Table,” on

page 102.

6.7.2

LOGICAL DEVICE CONFIGURATION REGISTERS

The Logical Device Configuration registers support motherboard designs in which the resources required by their com-

ponents are known and assigned by the BIOS at POST.

Each logical device may have a set of directly I/O addressable Runtime Registers, Configuration Registers accessible

via the Configuration Port, or DMA registers. The following table lists the register types for each LPC Host-accessible

Logical Device implemented in the design. The Embedded Controller (EC) can access all Configuration Registers and

all Runtime Registers directly.

TABLE 6-4:

CHIP-LEVEL (GLOBAL) CONTROL/CONFIGURATION REGISTERS

Offset

Description

Chip (Global) Control Registers

Reserved

00h - 06h

Reserved - Writes are ignored, reads return 0.

Logical Device Number

07h

A write to this register selects the current logical device. This

allows access to the control and configuration registers for each

logical device.

Note:

The Activate command operates only on the

selected logical device.

Reserved

08h - 1Fh

Reserved - Writes are ignored, reads return 0.

Device ID

20h

A read-only register which provides device identification:

Bits[7:0] = 15h

Device Revision

Hard Wired

21h

A read-only register which provides device revision information.

Bits[7:0] = current revision when read

Reserved

24h

Reserved – writes are ignored, reads return “0”.

MCHP Reserved

25h - 2Fh

MCHP Reserved.

This register locations are reserved for Microchip use. Modify-

ing these locations may cause unwanted results.

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