STM32F756VG datasheet(19/228 Pages) STMICROELECTRONICS

部件名	STM32F756VG

功能描述	Up to 25 communication interfaces

PDF	228 Pages

Scroll/Zoom	100%

制造商	STMICROELECTRONICS [STMicroelectronics]

网页	http://www.st.com

标志

19 / 228 page

DocID027589 Rev 4

19/228

STM32F756xx

Functional overview

Figure 3. STM32F756xx AXI-AHB bus matrix architecture

1. The above figure has large wires for 64-bits bus and thin wires for 32-bits bus.

2.7

DMA controller (DMA)

The devices feature two general-purpose dual-port DMAs (DMA1 and DMA2) with 8

streams each. They are able to manage memory-to-memory, peripheral-to-memory and

memory-to-peripheral transfers. They feature dedicated FIFOs for APB/AHB peripherals,

support burst transfer and are designed to provide the maximum peripheral bandwidth

(AHB/APB).

The two DMA controllers support circular buffer management, so that no specific code is

needed when the controller reaches the end of the buffer. The two DMA controllers also

have a double buffering feature, which automates the use and switching of two memory

buffers without requiring any special code.

STM32F756VG 数据表(PDF) 19 Page - STMicroelectronics