STM32F756VG datasheet(35/228 Pages) STMICROELECTRONICS

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STM32F756xx

Functional overview

2.22.3

Basic timers TIM6 and TIM7

These timers are mainly used for DAC trigger and waveform generation. They can also be

used as a generic 16-bit time base.

TIM6 and TIM7 support independent DMA request generation.

2.22.4

Low-power timer (LPTIM1)

The low-power timer has an independent clock and is running also in Stop mode if it is

clocked by LSE, LSI or an external clock. It is able to wakeup the devices from Stop mode.

This low-power timer supports the following features:

•

16-bit up counter with 16-bit autoreload register

•

16-bit compare register

•

Configurable output: pulse, PWM

•

Continuous / one-shot mode

•

Selectable software / hardware input trigger

•

Selectable clock source:

•

Internal clock source: LSE, LSI, HSI or APB clock

•

External clock source over LPTIM input (working even with no internal clock source

running, used by the Pulse Counter Application)

•

Programmable digital glitch filter

•

Encoder mode

2.22.5

Independent watchdog

The independent watchdog is based on a 12-bit downcounter and 8-bit prescaler. It is

clocked from an independent 32 kHz internal RC and as it operates independently from the

main clock, it can operate in Stop and Standby modes. It can be used either as a watchdog

to reset the device when a problem occurs, or as a free-running timer for application timeout

management. It is hardware- or software-configurable through the option bytes.

2.22.6

Window watchdog

The window watchdog is based on a 7-bit downcounter that can be set as free-running. It

can be used as a watchdog to reset the device when a problem occurs. It is clocked from

the main clock. It has an early warning interrupt capability and the counter can be frozen in

debug mode.

2.22.7

SysTick timer

This timer is dedicated to real-time operating systems, but could also be used as a standard

downcounter. It features:

•

A 24-bit downcounter

•

Autoreload capability

•

Maskable system interrupt generation when the counter reaches 0

•

Programmable clock source.

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