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LP8725TLE-A/NOPB 数据表(PDF) 22 Page - Texas Instruments |
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LP8725TLE-A/NOPB 数据表(HTML) 22 Page - Texas Instruments |
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22 / 46 page  LP8725 SNVS618G – DECEMBER 2009 – REVISED MAY 2013 www.ti.com LOGIC AND CONTROL (continued) Unless otherwise noted, VIN1=VIN2=VIN3=VINB1 =VINB2=VINLILO1=VINLILO2=3.6V; CLODX=1µF; CBUCKOUT=CBUCKIN=4.7 µF, CVIN1–3=CVINLILO1CVINLILO2=2.2 µF. Typical values and limits appearing in normal type apply for TJ=25°C. Limits appearing in boldface type apply over the entire junction temperature range for operation, TJ= -40 to +125°C. (1) Symbol Parameter Conditions Min Typ Max Unit IIH Input High Level Current PS_HOLD, DEFSEL, CONFIG, DVS 0 2 VIH = VIN1 RPD Pull Down Resistance From EN, PWR_ON, B2_EN, and 500 k Ω LDO3_EN Logic and Control Outputs VOL Output Low Level SDA, RESET_N 0.14 0.3 V IOUT = 2mA IOH Output High Level SDA, RESET_N have Open drain outputs 0 2 µA VOH = VIN1 BUCK CONVERTERS Unless otherwise noted, VIN1=VIN2=VIN3=VINB1 =VINB2=VINLILO1=VINLILO2=3.6V; CLODX=1µF; CBUCKOUT=CBUCKIN=4.7 µF, CVIN1–3=CVINLILO1CVINLILO2=2.2 µF. Typical values and limits appearing in normal type apply for TJ=25°C. Limits appearing in boldface type apply over the entire junction temperature range for operation, TJ= -40 to +125°C. (1) (2) Symbol Parameter Conditions Min Typ Max Unit BUCK1 Feedback Voltage -2 +2 VFB VOUT = 1.8V % BUCK2 Feedback Voltage -3 +3 RDSON(P) Pin-Pin resistance for PFET IOUT = 200 mA 265 m Ω RDSON(N) Pin-Pin resistance for NFET IOUT = −200 mA 150 m Ω Open-loop, programmable: 460 250 mA max IOUT typ 780 450 mA max IOUT typ ILIM Switch Peak Current Limit mA 600 mA max IOUT typ 750 1050 1500 800 mA max IOUT typ 1370 tSTUP Startup Time IOUT = 0mA to 100 mA 170 µs fSW Switching Frequency 3.6 4.1 4.4 MHz (1) Min and Max limits are specified by design, test or statistical analysis. Typical numbers are not verified, but do represent the most likely norm. (2) The parameters in the electrical characteristic table are tested under open loop conditions at VIN = 3.6V unless otherwise specified. For performance over the input voltage range and closed loop condition, refer to the datasheet curves. DIGITAL LDOs (1, 2, 3) Unless otherwise noted, VIN1=VIN2=VIN3=VINB1=VINB2=VINLILO1=VINLILO2=3.6V; CLODX=1µF; CBUCKOUT=CBUCKIN=4.7 µF, CVIN1–3=CVINLILO1CVINLILO2=2.2 µF. Typical values and limits appearing in normal type apply for TJ=25°C. Limits appearing in boldface type apply over the entire junction temperature range for operation, TJ= -40 to +125°C. (1) Symbol Parameter Conditions Min Typ Max Unit −1.5 +1.5 LDO1 Output Voltage Accuracy −2 +2 VOUT IOUT = 1mA, VOUT = 2.8V % −2 +2 LDOs 2 & 3 Output Voltage Accuracy −2.5 +2.5 VOUT + 0.5V ≤ VIN2 ≤ 4.5V Line Regulation 2 mV IOUT = 1mA (2) ΔVOUT Load Regulation 1 < IOUT < 300 mA 2 (1) Min and Max limits are specified by design, test or statistical analysis. Typical numbers are not verified, but do represent the most likely norm. (2) The minimum input voltage equals VOUT (nom) + 0.5V or 2.5V, which ever is greater. 22 Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: LP8725 |
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