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LP8725TLE-A/NOPB 数据表(PDF) 10 Page - Texas Instruments |
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LP8725TLE-A/NOPB 数据表(HTML) 10 Page - Texas Instruments |
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10 / 46 page ![]() EN Buck 1 0 1 2 3 Buck 2 tBON tS START UP sequence Timing Code SHUT DOWN sequence is in reverse order of START UP sequence Timing Code EN Buck 1 0 1 2 3 Buck 2 LDO1 LDO1 LDO3 LDO3 STANDBY START UP tS tS tS tS tS tS tS tS tS tS tS SHUT DOWN STANDBY IDLE Note 4 LDO4 LDO4 LDO5 LDO5 LILO 2 LILO 2 LILO 1 LILO 1 4 5 6 6 5 4 LDO2 LDO2 LP8725 SNVS618G – DECEMBER 2009 – REVISED MAY 2013 www.ti.com Figure 6. LP8725 Startup and Shutdown Sequence if CONFIG=GND, DEFSEL=GND Note 1, Note 2 All timing is typical. tBON 75 µs - Reference and bias turn ON. ts Programmable time steps. (Typically 64 µs/step.) Time step accuracy is defined by OSC frequency accuracy. Note 1 STARTUP and SHUTDOWN sequences are defined by registers. Sequences given here are valid if there the registers are not rewritten via Serial Interface. Note 2 The timing showed here define time points when LDOs and BUCK are enabled/disabled. Enabling /disabling process duration depends on voltages and loading conditions. Buck startup duration is typically 170 µs. LDO startup duration is typically 35 µs. For details please see LDOs and BUCK Electrical Specifications. Note 4 At this time point registers are reset to POR default values. 10 Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: LP8725 |
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