LP8725

SNVS618G – DECEMBER 2009 – REVISED MAY 2013

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DEVICE DESCRIPTION

Operation Modes

POWER-ON-RESET: In SUB_PMU configuration - After VIN1 goes above UVLO high threshold, then all internal

registers of LP8725 are reset to the default values from the DEFSEL setting, after which LP8725 goes to

STANDBY mode. In PMU configuration - When PWR_ON goes high while VIN1 is above the UVLO high

threshold, all internal registers of LP8725 are reset to the default values from the DEFSEL setting. This

process duration max is typically 500 µs.

STANDBY: In STANDBY mode only serial interface is working and all other PMU functions are disabled – PMU

is in low-power condition. In STANDBY mode LP8725 can be (re)configured via Serial Interface. The

LP8725 only enters STANDBY mode automatically in SUB_PMU configuration.

STARTUP: STARTUP sequence is defined by registers contents. STARTUP sequence starts:

1) If rising edge on EN-pin in SUB_PMU configuration.

2) After cooling down from thermal shutdown event if EN=1 in SUB_PMU configuration.

3) If PWR_ON is still high after 30 ms (typical de-bounce time) in PMU configuration. It is not

recommended to write to LP8725 registers during STARTUP. If doing so then current STARTUP

sequence may become undefined.

In SUB_PMU configuration RESET_N is de-asserted 30 ms (typical) after EN=1. In PMU configuration

RESET_N is de-asserted a further 30 ms (typical) after PWR_ON de-bounce time has ended.

It is not recommended to write to LP8725 registers during startup. If doing so then current STARTUP

sequence may become undefined.

IDLE: The LP8725 will enter into IDLE mode (normal operating mode) after end of startup sequence. In IDLE

mode all LDOs and BUCK can be enabled/disabled via Serial Interface. Also in IDLE mode the LP8725

can be (re)configured via Serial Interface.

SHUTDOWN: SHUTDOWN sequence follows the reverse order of the startup sequence defined by registers

contents:

1) If falling edge on EN-pin in SUB_PMU configuration.

2) If PS_HOLD and PWR_ON both go low for typically 30 ms in PMU configuration. Device immediately

shuts down if the temperature exceeds thermal shutdown threshold TSD +160°C.

RESET_N is asserted when the device starts to shut down.

It is not recommended to write to LP8725 registers during SHUT DOWN. If doing so then current

SHUTDOWN sequence may become undefined.

In SUB_PMU configuration the device shuts down to STANDBY mode.

In PMU configuration the device shuts down completely (so registers will be reset on next PWR_ON high).

SLEEP: The load current for each of the LDO outputs should be no greater than 5mA when the device is put into

SLEEP mode. In Sleep mode Ground current is minimized. SLEEP mode is controlled by the serial

interface, Register 0x00 bit 1.

SLEEP Mode is controlled by the Serial Interface.

CONFIG

Application

Pin B3 Function

Pin E3 Function

Slave Address,

Slave Address,

DEFSEL = 1

DEFSEL = 0

GND

SUB_PMU

B2_EN

EN

7h'78

7h'7A

VIN1

PMU

PS_HOLD

PWR_ON

7h'79

7h'7B

(1)

The LP8725 and LP8725-A are both configured as either SUB_PMU or PMU by the wiring of the CONFIG pin on the application of

power to the device.

(2)

These are dependent on whether DEFSEL is connected to VIN1 or GND when PWR_ON/EN=1.

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