2

2

4 x f x C

where

r =

+

x 1 -

r

2

12

LP8725

www.ti.com

SNVS618G – DECEMBER 2009 – REVISED MAY 2013

APPLICATION INFORMATION

Inductor Selection

DC bias current characteristics of inductors must be considered. Different manufacturers follow different

saturation current rating specifications, so attention must be given to details. DC bias curves should be requested

from them as part of the inductor selection process.

over the ambient temp range. The inductor’s DC resistance should be less than 0.1

Ω for good efficiency at

high current condition. The inductor AC loss (resistance) also affects conversion efficiency. Higher Q factor at

switching frequency usually gives better efficiency at light load to medium load instead. Table 13 lists suggested

inductors and suppliers.

Input Capacitor Selection

A ceramic input capacitor of 4.7

μF, 6.3V/10V is sufficient for most applications. Place the input capacitor as close

improve input voltage filtering. Use X7R, X5R or B types, do not use Y5V or F.

Minimum input capacitance to guarantee good performance is 4.7 µF at maximum input voltage DC bias

including tolerances and over ambient temp range. The input filter capacitor supplies current to the PFET

(high-side) switch in the first half of each cycle and reduces voltage ripple imposed on the input power source. A

ceramic capacitor's low ESR provides the best noise filtering of the input voltage spikes due to this rapidly

changing current. Select an input filter capacitor with sufficient ripple current rating. The input current ripple can

be calculated as:

(1)

(2)

Output Capacitor Selection

Use a 4.7

μF, 6.3V ceramic capacitor, X7R, X5R or B types, do not use Y5V or F. DC bias voltage characteristics

of ceramic capacitors must be considered. DC bias characteristics vary from manufacturer to manufacturer and

DC bias curves should be requested from them as part of the capacitor selection process. The output filter

capacitor smooths out current flow from the inductor to the load, helps maintain a steady output voltage during

transient load changes and reduces output voltage ripple. These capacitors must be selected with sufficient

capacitance and sufficiently low ESR to perform these functions.

Minimum output capacitance to guarantee good performance is 2.2 µF at the output voltage DC bias

including tolerances and over ambient temp range. The output voltage ripple is caused by the charging and

discharging of the output capacitor and also due to its ESR and can be calculated as:

Voltage peak to peak ripple due to capacitance =

Because these two components are out of phase the rms value can be used to get an approximate value of

peak-to-peak ripple.

Voltage peak-to-peak ripple, root mean squared =

Note that the output ripple is dependent on the current ripple and the equivalent series resistance of the output

capacitor (ESR). The RESR is frequency dependent (as well as temperature dependent); make sure the value

used for calculations is at the switching frequency of the part.

Table 14 lists suggested capacitors and suppliers.

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