TNETX3150GGP datasheet(52/113 Pages) TI1

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TNETX3150/TNETX3150A

ThunderSWITCH™ 15-PORT 10-/100-MBIT/S ETHERNET™ SWITCH

SPWS027F – FEBRUARY 1997 – REVISED SEPTEMBER 1997

POST OFFICE BOX 655303

• DALLAS, TEXAS 75265

DRAM test-access operation

DIO ADDRESS

DRAM data

0x00D4–0x00D7

DRAM addr

DRAM flag

0x00D8–0x00DB

INIST

PACTST

DIATST

Reserved

0x00DC–0x00DF

The user can write and read a repeating DRAM test by using the following procedure.

• Soft reset the TNETX3150/TNETX3150A (do not set the start bit). Perform the following:

DIO write (address 00C3) = 80

DIO write (address 00C3) = 00

• Write to the port 00 TX FIFO block (72 bytes total):

DIO write (address CE00) = A5

DIO write (address CE01) = A5

DIO write (address CE02) = A5

DIO write (address CE03) = A5

DIO write (address CE04) = A5

DIO write (address CE05) = A5

DIO write (address CE06) = A5

DIO write (address CE07) = A5

DIO write (address CE08) = A5

• The FIFO can be filled by writing to the following offset:

DIO write (address C208 + (10 * n)) = A5

where n = 0–7

• Write the DRAM forward pointer, flag,and DRAM address:

DIO write (address 00D4) = FF

;Forward pointer least-significant bit

DIO write (address 00D5) = FF

;Forward pointer

DIO write (address 00D6) = FF

;Forward pointer

DIO write (address 00D7) = FF

;Forward pointer most-significant bit

DIO write (address 00D8) = xF

;Flag

DIO write (address 00D9) = 00

;DRAM address least-significant bit

DIO write (address 00DA) = 00

;DRAM address

DIO write (address 00DB) = 80

;DRAM address most-significant bit

TNETX3150GGP 数据表(PDF) 52 Page - Texas Instruments

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