TNETX3150GGP datasheet(57/113 Pages) TI1

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TNETX3150/TNETX3150A

ThunderSWITCH™ 15-PORT 10-/100-MBIT/S ETHERNET™ SWITCH

SPWS027F – FEBRUARY 1997 – REVISED SEPTEMBER 1997

POST OFFICE BOX 655303

• DALLAS, TEXAS 75265

EEPROM interface

The EEPROM interface is provided so the system-level manufacturer can optionally provide a preconfigured

system to their customers. Customers also can change or reconfigure their system and retain their preferences

between system power downs.

The EEPROM contains configuration and initialization information, which is accessed infrequently (typically at

power up and reset).

The TNETX3150/TNETX3150A uses the 24C02 serial EEPROM device (2048 bits organized as 256 bits

× 8).

See Table 10.

The organization of the EEPROM data is the same format as the TNETX3150/TNETX3150A registers

0x00–0xC3 (see section on internal registers). This allows a complete initialization to be performed by

downloading the contents of the EEPROM into the TNETX3150/TNETX3150A. During the download, no DIO

operations are permitted. The LOAD bit in the system control registers cannot be set during a download,

preventing a download loop. The LOAD bit is reset after completion of the download.

TNETX3150/TNETX3150A detects the presence/absence of the EEPROM. If no EEPROM is installed, the

EDIO terminal should be tied low. For EEPROM operation, the terminal requires an external pullup (see

EEPROM data sheet). If no EEPROM is detected, the TNETX3150/TNETX3150A assumes default modes of

operation at power up. Downloading the configuration from the EEPROM terminals is disabled when no

EEPROM is present. The timing information for the EEPROM interface is provided in Figures 20 and 21.

EEPROM auto-configuration from an external x24C02 EEPROM

The EEPROM can be initialized or reprogrammed through the DIO/host interface using a suitable software

driver.

The organization of the EEPROM data is shown in Table 10. The last register loaded is the control register. This

allows a complete initialization by downloading the contents of the EEPROM into the external-address lookup

devices. During the download, no DIO operations are permitted. The LOAD and RESET bits in the control

The TNETX3150/TNETX3150A detects the presence/absence of the EEPROM. If it is not installed, the EDIO

terminal should be tied low. For EEPROM operation, the terminal requires an external pullup (see EEPROM

data sheet). When no EEPROM is detected, the TNETX3150/TNETX3150A assumes default register values

at power up and is halted. Downloading a configuration from the EEPROM terminals is disabled when no

EEPROM is present.

The first bit written to or read from the EEPROM is the most-significant bit of the byte, i.e., data (7). Therefore,

writing the address 0xC0h is accomplished by writing a 1 and then 1, 0, 0, 0, 0, 0, 0.

The TNETX3150/TNETX3150A expects data to be stored in the EEPROM in a specific format. The range from

0x0000h – 0x00C3h in the EEPROM is reserved for use by the adapter. The contents of the remaining bytes

are undefined. The EEPROM can be read/written by a software driver through the SIO register.

A 32-bit CRC value must be calculated from the EEPROM data and placed in the EEPROM in the location

following the bytes loaded into the internal register. the TNETX3150/TNETX3150A uses this 32-bit CRC to

validate the EEPROM data. If the CRC fails, the TNETX3150/TNETX3150A registers are set to their default

(hardwired) values. The TNETX3150/TNETX3150A is then placed in a post-reset halted state. The

TNETX3150/TNETX3150A must be started through the DIO interface control register START bit.

The EEPROM algorithm, which is the same as the algorithm for the TNETX3150/TNETX3150A EEPROM CRC,

is used by IEEE Std 802.3 for the packet CRC calculation. EEPROM bytes are processed by the internal logic

in sequence just as bytes of a packet are processed. For a description of the algorithm, see Section 3.2.8. of

the IEEE Std 802.3u specification. For reference, the equation is:

G(x) = x32 + x26 + x23 + x22 + x16 + x12 + x11 + x10 + x8 + x7 + x5 + x4 + x2 + x + 1

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