TNETX3150GGP datasheet(53/113 Pages) TI1

53 / 113 page

TNETX3150/TNETX3150A

ThunderSWITCH™ 15-PORT 10-/100-MBIT/S ETHERNET™ SWITCH

SPWS027F – FEBRUARY 1997 – REVISED SEPTEMBER 1997

POST OFFICE BOX 655303

• DALLAS, TEXAS 75265

DRAM test-access operation

(continued)

• The DRAM access occurs after the high byte (location 00DB) of the DRAM_address register is

completed. To verify the DRAM access is complete, read the DRAMACT bit within the DRAM flag

DIO read (address 00D8) = 8x

DMA transfer not complete

DIO read (address 00D8) = 0x

DMA transfer complete

• Clear the forward pointer, flag and perform a DRAM read:

DIO write (address 00D4) = 00

;Forward pointer least-significant bit

DIO write (address 00D5) = 00

;Forward pointer

DIO write (address 00D6) = 00

;Forward pointer

DIO write (address 00D7) = 00

;Forward pointer most-significant bit

DIO write (address 00D8) = x0

;Flag

DIO write (address 00D9) = 00

;DRAM address least-significant bit

DIO write (address 00DA) = 00

;DRAM address

DIO write (address 00DB) = 00

;DRAM address most-significant bit

• Now wait for the read from DRAM to complete by polling the DRAMACT bit within the DRAM flag

DIO read (address 00D8) = 8x

DMA transfer not complete

DIO read (address 00D8) = 0x

DMA transfer complete

• Read the forward pointer, flag, and DRAM data:

DIO read (address 00D4–00D7)

DIO read (address 00D8)

DIO read (address CC00 + (10 * n)) through (address CC08 + (10 * n))

where n = 0–7

TNETX3150GGP 数据表(PDF) 53 Page - Texas Instruments

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