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TNETX3150GGP 数据表(PDF) 10 Page - Texas Instruments |
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TNETX3150GGP 数据表(HTML) 10 Page - Texas Instruments |
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10 / 113 page  TNETX3150/TNETX3150A ThunderSWITCH™ 15-PORT 10-/100-MBIT/S ETHERNET™ SWITCH SPWS027F – FEBRUARY 1997 – REVISED SEPTEMBER 1997 10 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 Terminal Functions (Continued) 10-/100-Mbit/s MAC interface (ports 01–02) (continued) TERMINAL I/O DESCRIPTION NAME NO. I/O DESCRIPTION M01TXD3 C13 M02TXD3 B7 M01TXD2 D13 Transmit data Nibble transmit data is from the TNETX3150/TNETX3150A When MXXTXEN is M02TXD2 C7 O Transmit data. Nibble transmit data is from the TNETX3150/TNETX3150A. When MXXTXEN is asserted, these terminals carry transmit data. Data on these terminals is always synchronous to M01TXD1 A12 O ,y y y MXXTCLK. If the MWIDTH bit in the port control register and the M00SPEED terminal are set low, then data is transmitted on M01TXD0 and M02TXD0 M02TXD1 A6 then data is transmitted on M01TXD0 and M02TXD0. M01TXD0 B12 M02TXD0 B6 M01TXEN D12 O Transmit enable. MXXTXEN indicates valid transmit data on MXXTXD. High valid transmit data M02TXEN A7 O High = valid transmit data Low = no valid transmit data M01TXER C14 O Transmit error. MXXTXER allows coding errors to be propagated across the media-independent interface (MII). M02TXER D8 O () High = transmit error Low = no transmit error 10-/100-/200-Mbit/s uplink MAC interface (port 00) TERMINAL I/O DESCRIPTION NAME NO. I/O DESCRIPTION M00COL B14 I Collision sense. Assertion of M00COL indicates network collision. In full-duplex operation, M00COL can be used as a flow-control signal. High = network collision Low = no network collision M00CRS D15 I Carrier sense. M00CRS indicates a frame carrier signal is being received. High = frame carrier Low = no frame carrier M00PROTOCOL C15 I Interface protocol. M00PROTOCOL indicates the protocol of the interface and is determined by the logic level on the terminal. When high, it indicates a request/grant interface for datastreaming applications. When low, it indicates a CSMA/CD interface. For 200-Mbit/s uplink operation, M00PROTOCOL should be held high (refer to uplink flow-control protocol for details). For standard Ethernet applications, M00PROTOCOL should be held low. M00DUPLEX B15 I/O Duplex selector. M00DUPLEX switches the interface between full- and half-duplex operation (low = half duplex, high = full duplex). The M00DUPLEX input has an active pulldown circuit used to force the output low when the FORCEHD bit is set. M00LINK A15 I Link selector. M00LINK indicates the condition of the port connection (low = no link, high = link OK) (in 200-Mbit/s mode, M00LINK = 1). M00RCLK D16 I Receive clock. M00RCLK source is from the external PHY device. M00RXD0 C16 M00RXD1 B16 Receive data Nibble/byte receive data is from the PMD front end Data is synchronous to M00RXD2 A16 Receive data. Nibble/byte receive data is from the PMD front end. Data is synchronous to M00RCLK. M00RXD3 D17 I M00RCLK. Port 00 can receive 4- or 8-bit data and this is determined by strapping terminal M00UPLINK: when M00RXD4 C17 I yg low, the uplink operates in the wide 8-bit mode; when high, the upper-nibble bits (4–7) are not d i l i 4 bit d t If th MWIDTH bit i th t t l i t d th M00SPEED t i l M00RXD5 B17 driven, leaving 4-bit data. If the MWIDTH bit in the port control register and the M00SPEED terminal are set low then data is received on the M00RXD0 terminal M00RXD6 A17 are set low, then data is received on the M00RXD0 terminal. M00RXD7 C18 |
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