PC87591L datasheet(21/437 Pages) NSC

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Table of Contents (Continued)

Revision 1.07

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7.6.11

ICU/Development Timing .......................................................................................... 400

7.6.12

Asynchronous Edge Detected Signals Timing .......................................................... 401

7.6.13

Debugger Interface Timing ........................................................................................ 402

7.6.14

USART Timing ........................................................................................................... 404

7.6.15

LCLK and RESET1-2 ................................................................................................ 406

7.6.16

LPC and SERIRQ Signals ......................................................................................... 407

Software for Hardware Interface

A.1

CORE DOMAIN REGISTER LIST ........................................................................................... 408

A.1.1

Module Configuration ................................................................................................ 408

A.1.2

Bus Interface Unit (BIU) ............................................................................................. 408

A.1.3

DMA Controller .......................................................................................................... 408

A.1.4

General-Purpose I/O (GPIO) Ports ............................................................................ 409

A.1.5

PS/2 Ports ................................................................................................................. 411

A.1.6

Host Interface (KBC, PM1 and PM2Channels) ......................................................... 411

A.1.7

Multi-Function Timer (MTF16) 1 ................................................................................ 412

A.1.8

Multi-Function Timer (MFT16) 2 ................................................................................ 412

A.1.9

Timing and WATCHDOG (TWD) ............................................................................... 413

A.1.10

Analog to Digital Converter (ADC) ............................................................................. 413

A.1.11

Digital to Analog Converter (DAC) ............................................................................. 413

A.1.12

ACCESS.bus Interface (ACB) 1 ................................................................................ 414

A.1.13

ACCESS.bus Interface (ACB) 2 ................................................................................ 414

A.1.14

Analog Comparators Monitor (ACM) ......................................................................... 414

A.1.15

Power Management (PM) .......................................................................................... 415

A.1.16

High Frequency Clock Generator (HFCG) ................................................................ 415

A.1.17

Development System Support ................................................................................... 415

A.1.18

Multi-Input Wake-Up (MIWU) .................................................................................... 415

A.1.19

Interrupt Control Unit (ICU) ........................................................................................ 416

A.1.20

Debugger Interface .................................................................................................... 416

A.1.21

Pulse Width Modulator (PWM) .................................................................................. 417

A.1.22

Universal Synchronous/Asynchronous Receiver Transmitter (USART) .................... 417

A.1.23

Flash Interface ........................................................................................................... 418

A.1.24

Shared Memory Core ................................................................................................ 418

A.1.25

Core Access to SuperI/O ........................................................................................... 419

A.1.26

Mobile System Wake-Up Control (MSWC) ................................................................ 419

A.2

HOST DOMAIN REGISTER LIST ........................................................................................... 420

A.2.1

Configuration Registers ............................................................................................. 420

Common SuperI/O Configuration ...................................................................... 420

Shared Memory ................................................................................................. 420

RTC Configuration ............................................................................................. 420

A.2.2

Host Runtime Registers ............................................................................................. 420

Shared Memory Host ......................................................................................... 421

MSWC Host Registers ....................................................................................... 421

Host Interface (HI) ............................................................................................. 421

Power Management Channel 1 ......................................................................... 422

PC87591L 数据表(PDF) 21 Page - National Semiconductor (TI)

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