PC87591L datasheet(7/437 Pages) NSC

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Table of Contents (Continued)

Revision 1.07

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2.2.12

Mobile System Wake-Up Control (MSWC) .................................................................. 51

2.2.13

Timers and PWM ......................................................................................................... 51

2.2.14

Universal Synchronous/Asynchronous Receiver/Transmitter (USART) ...................... 51

2.2.15

Internal Pull-Up and Pull-Down Resistors ................................................................... 52

2.3

STRAP PINS ............................................................................................................................. 53

Setting the Environment ...................................................................................... 53

Other Strap Pin Settings ...................................................................................... 53

System Load on Strap Pins ................................................................................. 53

Strap Pin Status Register (STRPST) ................................................................... 54

2.4

ALTERNATE FUNCTIONS ........................................................................................................ 54

2.4.1

GPIO with Alternate Functions .................................................................................... 54

2.4.2

System Configuration Registers .................................................................................. 58

Module Configuration Register (MCFG) .............................................................. 58

External Interrupts Configuration Register (EICFG) ............................................ 59

2.4.3

GPIO with Echo Configuration ..................................................................................... 59

Input to Output Echo Enable Register 1 and 2 (IOEE1 and IOEE2) .................... 60

3.0

Power, Reset and Clocks

3.1

POWER ..................................................................................................................................... 62

3.1.1

Power Planes .............................................................................................................. 62

3.1.2

Power States ...............................................................................................................62

3.1.3

Power Connection and Layout Guidelines .................................................................. 63

3.2

RESET SOURCES AND TYPES ............................................................................................... 65

3.2.1

VPP Power-Up Reset ................................................................................................... 66

3.2.2

VCC Power-Up Reset ................................................................................................... 66

3.2.3

WATCHDOG Reset and Debugger Interface Reset .................................................... 66

3.2.4

Warm Reset .................................................................................................................66

3.2.5

Host Domain Reset ..................................................................................................... 67

Using RESET2 Input ............................................................................................ 67

Host Domain Reset Actions ................................................................................. 67

3.3

CLOCK DOMAINS ..................................................................................................................... 68

LPC Clock ............................................................................................................ 68

RTC (32 KHz) Clock ............................................................................................ 68

4.0

Embedded Controller Modules

4.1

BUS INTERFACE UNIT (BIU) ................................................................................................... 69

4.1.1

Features ...................................................................................................................... 69

4.1.2

Functional Description ................................................................................................. 69

Interface ............................................................................................................... 69

Static Memory and I/O Support ........................................................................... 69

Byte Access ......................................................................................................... 69

Clock and Bus Cycles .......................................................................................... 70

4.1.3

Clock Cycles ................................................................................................................ 71

Optional Clock Cycles .......................................................................................... 71

Other Clock Cycles .............................................................................................. 71

PC87591L 数据表(PDF) 7 Page - National Semiconductor (TI)

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