PC87591L datasheet(9/437 Pages) NSC

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Table of Contents (Continued)

Revision 1.07

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Pending Interrupts ............................................................................................... 99

Interrupt Priorities ................................................................................................ 99

Power-Down Modes ............................................................................................ 99

External Interrupt Inputs ...................................................................................... 99

Interrupt Assignment ............................................................................................ 99

4.3.4

ICU Registers ............................................................................................................ 101

ICU Register Map .............................................................................................. 101

Interrupt Vector Register (IVCT) ........................................................................ 101

NMI Status Register (NMISTAT) ....................................................................... 101

Power Fail Interrupt Control and Status Register (PFAIL) ................................. 102

Interrupt Status Register 0 (ISTAT0) ................................................................. 102

Interrupt Status Register 1 (ISTAT1) ................................................................. 103

Interrupt Enable and Mask Register 0 (IENAM0) .............................................. 103

Interrupt Enable and Mask Register 1 (IENAM1) .............................................. 103

Edge Interrupt Clear Register 0 (IECLR0) ......................................................... 104

Edge Interrupt Clear Register 1 (IECLR1) ......................................................... 104

4.3.5

Usage Hints ............................................................................................................... 104

Initializing ........................................................................................................... 104

Clearing ............................................................................................................. 104

Nesting ............................................................................................................... 104

4.4

MULTI-INPUT WAKE-UP (MIWU) ........................................................................................... 105

4.4.1

Features .................................................................................................................... 105

4.4.2

Operation ................................................................................................................... 105

4.4.3

MIWU Registers ........................................................................................................ 109

MIWU Register Map .......................................................................................... 109

Edge Detection Register (WKEDG1) ................................................................. 109

Edge Detection Register (WKEDG2) ................................................................. 110

Edge Detection Register (WKEDG3) ................................................................. 110

Edge Detection Register (WKEDG4) ................................................................. 110

Pending Register (WKPND1) ............................................................................ 110

Pending Register (WKPND2) ............................................................................ 110

Pending Register (WKPND3) ............................................................................ 110

Pending Register (WKPND4) ............................................................................ 111

Enable Register (WKEN1) ................................................................................. 111

Enable Register (WKEN2) ................................................................................. 111

Enable Register (WKEN3) ................................................................................. 111

Enable Register (WKEN4) ................................................................................. 111

Pending Clear Register (WKPCL1) ................................................................... 111

Pending Clear Register (WKPCL2) ................................................................... 112

Pending Clear Register (WKPCL3) ................................................................... 112

Pending Clear Register (WKPCL4) ................................................................... 112

4.4.4

Usage Hints ............................................................................................................... 112

4.5

GENERAL-PURPOSE I/O (GPIO) PORTS ............................................................................. 113

GPIO Port Functionality ..................................................................................... 113

4.5.1

Features .................................................................................................................... 114

4.5.2

GPIO Port Px ............................................................................................................. 114

Bidirectional Port with Alternate Function .......................................................... 114

4.5.3

GPI Port Py ................................................................................................................ 116

Input Only Port with Alternate Function ............................................................. 116

4.5.4

GPO Port Pz .............................................................................................................. 117

Output Only Port with Alternate Function .......................................................... 117

PC87591L 数据表(PDF) 9 Page - National Semiconductor (TI)

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