PC87591L datasheet(22/437 Pages) NSC

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Table of Contents (Continued)

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Revision 1.07

Power Management Channel 2 ......................................................................... 422

RTC ................................................................................................................... 422

A.3

CORE DOMAIN REGISTER LAYOUT .................................................................................... 424

A.3.1

Module Configuration ................................................................................................ 424

A.3.2

Bus Interface Unit (BIU) ............................................................................................. 424

A.3.3

DMA Controller .......................................................................................................... 424

A.3.4

General-Purpose I/O (GPIO) Port ............................................................................. 424

A.3.5

PS/2 Interface ............................................................................................................ 425

A.3.6

Core Interface ............................................................................................................ 425

A.3.7

Multi-Function Timer (MFT16) ................................................................................... 426

A.3.8

Timing and WATCHDOG (TWD) ............................................................................... 426

A.3.9

Analog to Digital Converter (ADC) ............................................................................. 426

A.3.10

Digital to Analog (DAC) ............................................................................................. 427

A.3.11

ACCESS.bus Interface (ACB) ................................................................................... 427

A.3.12

Analog Comparators Monitor (ACM) ......................................................................... 427

A.3.13

Power Management (PM) .......................................................................................... 427

A.3.14

High-Frequency Clock Generator (HFCG) ................................................................ 427

A.3.15

Development System Support ................................................................................... 427

A.3.16

Multi-Input Wake-Up (MIWU) .................................................................................... 427

A.3.17

Interrupt Control Unit (ICU) ........................................................................................ 428

A.3.18

Debugger Interface .................................................................................................... 428

A.3.19

Pulse with Modulator (PWM) ..................................................................................... 429

A.3.20

Universal Synchronous/Asynchronous Receiver Transmitter (USART) .................... 429

A.3.21

Flash Interface ........................................................................................................... 429

A.3.22

Shared Memory Core ................................................................................................ 429

A.3.23

Core Access to SuperI/O ........................................................................................... 430

A.3.24

MSWC ....................................................................................................................... 430

A.4

HOST DOMAIN REGISTER LAYOUT ..................................................................................... 431

Host Configuration Registers ............................................................................. 431

A.4.1

SuperI/O Configuration .............................................................................................. 431

A.4.2

Shared Memory Configuration ................................................................................... 431

A.4.3

RTC Configuration ..................................................................................................... 431

Host Runtime Registers ..................................................................................... 431

A.4.4

Shared Memory Host ................................................................................................. 431

A.4.5

MSWC Host ............................................................................................................... 432

A.4.6

Host Interface (HI) Registers ..................................................................................... 432

A.4.7

RTC Registers ........................................................................................................... 432

Software for Hardware Interface

B.1

FACTORY PARAMETERS ...................................................................................................... 434

B.2

PROTECTION INFORMATION ............................................................................................... 435

PC87591L 数据表(PDF) 22 Page - National Semiconductor (TI)

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