FT121Q-R datasheet(11/46 Pages) FTDI

11 / 46 page

Document No.: FT_000648

FT121 ENHANCED USB DEVICE CONTROLLER WITH SPI SLAVE IC

Datasheet Version 1.2

Clearance No.: FTDI#

312

SS_n

Command

Write Data

SCLK

MOSI

MISO

Command

Write Data

Read Data

Figure 4-1 SPI access

The SPI slave supports SPI mode 1 (CPOL=0, CPHA=1). This means the rising edge is the driving edge

while the falling edge is the sample edge. The drive edge is always before the sample edge.

The maximum SPI clock supported is 20MHz, for both 4-wire and 3-wire modes. Refer to the AC

characteristics section for SPI timing figures.

4.3.1 4-wire write operation

When the SPI master performs a data write operation, it drives the SS_n line low, sends the 8-bit

command byte on MOSI line, followed by sending of the data bytes. The length of the data byte ranges

from 0 to maximum 506, depending on the command type. The master will signal the end of the data

write operation by drive the SS_n line high.

Figure 4-2 4-wire write operation

4.3.2 4-wire read operation

When the SPI master performs a data read operation, it drives the SS_n line low and sends the 8-bit

command byte on MOSI line. The FT121 will output data bytes on the MISO line. The length of the data

byte ranges from 0 to maximum 506, depending on the command type. The master will signal the end of

the data read operation by drive the SS_n line high.

FT121Q-R 数据表(PDF) 11 Page - Future Technology Devices International Ltd.