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STM32F303VC 数据表(PDF) 94 Page - STMicroelectronics |
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STM32F303VC 数据表(HTML) 94 Page - STMicroelectronics |
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94 / 148 page  Electrical characteristics STM32F303xB STM32F303xC 94/148 DocID023353 Rev 13 6.3.17 Communications interfaces I2C interface characteristics The I2C interface meets the timings requirements of the I2C-bus specification and user manual rev.03 for: • Standard-mode (Sm) : with a bit rate up to 100 Kbits/s • Fast-mode (Fm) : with a bit rate up to 400 Kbits/s • Fast-mode Plus (Fm+) : with a bit rate up to 1Mbits/s The I2C timings requirements are guaranteed by design when the I2C peripheral is properly configured (refer to Reference manual). The SDA and SCL I/O requirements are met with the following restrictions: the SDA and SCL I/O pins are “true” open-drain. When configured as open-drain, the PMOS connected between the I/O pin and VDDIOx is disabled, but is still present. Only FTf I/O pins support Fm+ low level output current maximum requirement. Refer to Section 6.3.14: I/O port characteristics. All I2C I/Os embed an analog filter. refer to theTable 62: I2C analog filter characteristics. Table 61. I2C timings specification (see I2C specification, rev.03, June 2007)(1) Symbol Parameter Standard mode Fast mode Fast Mode Plus Unit Min Max Min Max Min Max fSCL SCL clock frequency 0 100 0 400 0 1000 KHz tLOW Low period of the SCL clock 4.7 - 1.3 - 0.5 - µs tHIGH High Period of the SCL clock 4 0.6 0.26 - µs tr Rise time of both SDA and SCL signals - 1000 - 300 - 120 ns tf Fall time of both SDA and SCL signals - 300 - 300 - 120 ns tHD;DAT Data hold time 0 - 0 - 0 - µs tVD;DAT Data valid time - 3.45(2) -0.9(2) -0.45(2) µs tVD;ACK Data valid acknowledge time - 3.45(2) -0.9(2) -0.45(2) µs tSU;DAT Data setup time 250 - 100 - 50 - ns tHD:STA Hold time (repeated) START condition 4.0 - 0.6 - 0.26 - µs tSU:STA Set-up time for a repeated START condition 4.7 - 0.6 - 0.26 µs tSU:STO Set-up time for STOP condition 4.0 - 0.6 - 0.26 - µs tBUF Bus free time between a STOP and START condition 4.7 - 1.3 - 0.5 - µs Cb Capacitive load for each bus line - 400 - 400 - 550 pF tSP Pulse width of spikes that are suppressed by the analog filter for Standard and Fast mode 050(3) 050(3) -- ns |
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